EP2SGX30CF780C4N Altera, EP2SGX30CF780C4N Datasheet - Page 77
EP2SGX30CF780C4N
Manufacturer Part Number
EP2SGX30CF780C4N
Description
IC STRATIX II GX 30K 780-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX30CF780C4N
Number Of Logic Elements/cells
33880
Number Of Labs/clbs
1694
Total Ram Bits
1369728
Number Of I /o
361
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1927
EP2SGX30CF780C4N
EP2SGX30CF780C4N
Available stocks
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Manufacturer
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Price
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TriMatrix
Memory
Altera Corporation
October 2007
Column IOE
Row IOE
Maximum performance
True dual-port memory
Simple dual-port memory
Single-port memory
Shift register
ROM
FIFO buffer
Pack mode
Byte enable
Address clock enable
Parity bits
Mixed clock mode
Memory initialization (.mif)
Table 2–18. Stratix II GX Device Routing Scheme (Part 2 of 2)
Table 2–19. TriMatrix Memory Features (Part 1 of 2)
Memory Feature
Source
TriMatrix memory consists of three types of RAM blocks: M512, M4K,
and M-RAM. Although these memory blocks are different, they can all
implement various types of memory with or without parity, including
true dual-port, simple dual-port, and single-port RAM, ROM, and FIFO
buffers.
blocks.
M512 RAM Block
(32 × 18 Bits)
500 MHz
Table 2–19
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shows the size and features of the different RAM
M4K RAM Block
(128 × 36 Bits)
Destination
550 MHz
v v
Stratix II GX Device Handbook, Volume 1
v
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Stratix II GX Architecture
(4K × 144 Bits)
M-RAM Block
420 MHz
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(1)
2–69
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