EP2AGX95EF29C4N Altera, EP2AGX95EF29C4N Datasheet - Page 293

• Manufacturer Part Number: EP2AGX95EF29C4N
• Description: IC ARRIA II GX FPGA 95K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX95EF29C4N

• Number Of Logic Elements/cells: 89178
• Number Of Labs/clbs: 3747
• Total Ram Bits: 6679
• Number Of I /o: 372
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 93674
• # I/os (max): 372
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 93674
• Ram Bits: 7025459.2
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 10: SEU Mitigation in Arria II GX Devices
Recovering From CRC Errors
Software Support
Recovering From CRC Errors
© July 2010
Altera Corporation
The CRC calculation time for the error detection circuitry to check from the first until
the last frame depends on the device and the error detection clock frequency.
Table 10–8
maximum clock frequencies for Arria II GX devices. The minimum CRC calculation
time is calculated with the maximum error detection frequency with divisor factor 1,
and the maximum CRC calculation time is calculated with the minimum error
detection frequency with divisor factor 8.
Table 10–8. CRC Calculation Time
The Quartus II software, starting with version 8.1, supports the error detection CRC
feature for Arria II GX devices. Enable this feature in the Device and Pin Options
dialog box to generate the CRC_ERROR output to the optional dual purpose
CRC_ERROR pin.
Enable the error detection feature using the CRC feature by performing the following
steps:
1. Open the Quartus II software and load a project using an Arria II GX device.
2. On the Assignments menu, click Device. The Device dialog box appears.
3. Click Device and Pin Options. The Device and Pin Options dialog box appears.
4. In the Category list, select Error detection CRC.
5. Turn on Enable error detection CRC.
6. In the Divide error check frequency by box, enter a valid divisor as documented
7. Click OK.
8. Click OK.
The system that the Arria II GX device resides in must control device reconfiguration.
After detecting an error on the CRC_ERROR pin, strobing the nCONFIG signal low
directs the system to perform the reconfiguration at a time when it is safe.
When the data bit is rewritten with the correct value by reconfiguring the device, the
device functions correctly.
While soft errors are uncommon in Altera
applications may require a design to account for these errors.
EP2AGX45
EP2AGX65
EP2AGX95
EP2AGX125
EP2AGX190
EP2AGX260
in
Table 10–6 on page
Device
lists the estimated time for each CRC calculation with minimum and
10–7.
Minimum Time (ms)
159.12
159.12
271.44
271.44
467.22
467.22
®
devices, certain high-reliability
Arria II GX Device Handbook, Volume 1
Maximum Time (s)
20.40
20.40
34.80
34.80
59.90
59.90
10–9