XC3S50AN-4TQG144I Xilinx Inc, XC3S50AN-4TQG144I Datasheet - Page 77

• Manufacturer Part Number: XC3S50AN-4TQG144I
• Description: IC FPGA SPARTAN-3AN50K 144-TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3ANr

Specifications of XC3S50AN-4TQG144I

• Total Ram Bits: 55296
• Number Of Logic Elements/cells: 1584
• Number Of Labs/clbs: 176
• Number Of I /o: 108
• Number Of Gates: 50000
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 144-LQFP
• No. Of Logic Blocks: 176
• No. Of Gates: 50000
• No. Of Macrocells: 1584
• Family Type: Spartan-3AN
• No. Of Speed Grades: 4
• No. Of I/o's: 108
• Clock: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1597; XC3S50AN-4TQG144I

User I/Os by Bank
Table 69
The AWAKE pin is counted as a dual-purpose I/O.
Table 69: User I/Os Per Bank for the XC3S50AN in the TQG144 Package
Footprint Migration Differences
The XC3S50AN FPGA is the only Spartan-3AN device offered in the TQG144 package. The XC3S50AN FPGA is pin
compatible with the Spartan-3A XC3S50A FPGA in the TQ(G)144 package, although the Spartan-3A FPGA requires an
external configuration source.
DS557 (v4.1) April 1, 2011
Product Specification
Top
Right
Bottom
Left
Package
Edge
Total
indicates how the 108 available user-I/O pins are distributed between the four I/O banks on the TQG144 package.
I/O Bank
0
1
2
3
Maximum I/Os
108
27
25
30
26
I/O
14
11
15
42
2
www.xilinx.com
INPUT
1
0
0
1
2
All Possible I/O Pins by Type
Spartan-3AN FPGA Family: Pinout Descriptions
DUAL
21
26
1
4
0
VREF
3
2
1
2
8
CLK
30
8
8
6
8
77