XC3S400AN-4FGG400I Xilinx Inc, XC3S400AN-4FGG400I Datasheet - Page 116
![IC FPGA SPARTAN-3A 400K 400-FBGA](/photos/6/72/67298/pk083-400_sml.jpg)
XC3S400AN-4FGG400I
Manufacturer Part Number
XC3S400AN-4FGG400I
Description
IC FPGA SPARTAN-3A 400K 400-FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S400AN-4FGG400I
Total Ram Bits
368640
Number Of Logic Elements/cells
8064
Number Of Labs/clbs
896
Number Of I /o
311
Number Of Gates
400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
400-BGA
No. Of Logic Blocks
896
No. Of Gates
400000
No. Of Macrocells
8064
Family Type
Spartan-3AN
No. Of Speed Grades
4
No. Of I/o's
311
Clock
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S400AN-4FGG400I
Manufacturer:
TOSHIBA
Quantity:
198
Company:
Part Number:
XC3S400AN-4FGG400I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Table 82: Spartan-3AN FGG676 Pinout (Cont’d)
DS557 (v4.1) April 1, 2011
Product Specification
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
IO_L30N_3
IO_L30P_3
IO_L31N_3
IO_L31P_3
IO_L32N_3/LHCLK1
IO_L32P_3/LHCLK0
IO_L33N_3/IRDY2/LHCLK3
IO_L33P_3/LHCLK2
IO_L34N_3/LHCLK5
IO_L34P_3/LHCLK4
IO_L35N_3/LHCLK7
IO_L35P_3/TRDY2/LHCLK6
IO_L36N_3
IO_L36P_3/VREF_3
IO_L37N_3
IO_L37P_3
IO_L38N_3
IO_L38P_3
IO_L39N_3
IO_L39P_3
IO_L40N_3
IO_L40P_3
IO_L41N_3
IO_L41P_3
IO_L42N_3
IO_L42P_3
IO_L43N_3
IO_L43P_3/VREF_3
IO_L44N_3
IO_L44P_3
IO_L45N_3
IO_L45P_3
IO_L47N_3
IO_L47P_3
IO_L48N_3
IO_L48P_3
IO_L49N_3
IO_L49P_3
IO_L51N_3
IO_L51P_3
Pin Name
FGG676
Ball
R10
P10
T10
N5
N1
N7
N6
N9
R1
R3
R5
U1
R8
U5
N4
N2
P2
P1
P3
P4
R2
R4
T4
T3
P6
P7
R6
P9
P8
U4
T5
R9
U2
R7
V2
V1
T9
V5
U6
T7
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
LHCLK
VREF
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
www.xilinx.com
Table 82: Spartan-3AN FGG676 Pinout (Cont’d)
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Spartan-3AN FPGA Family: Pinout Descriptions
IO_L52N_3
IO_L52P_3
IO_L53N_3
IO_L53P_3
IO_L55N_3
IO_L55P_3
IO_L56N_3
IO_L56P_3
IO_L57N_3
IO_L57P_3
IO_L59N_3
IO_L59P_3
IO_L60N_3
IO_L60P_3
IO_L61N_3
IO_L61P_3
IO_L63N_3
IO_L63P_3
IO_L64N_3
IO_L64P_3
IO_L65N_3
IO_L65P_3
IP_L04N_3/VREF_3
IP_L04P_3
IP_L08N_3
IP_L08P_3
IP_L12N_3/VREF_3
IP_L12P_3
IP_L16N_3
IP_L16P_3
IP_L20N_3/VREF_3
IP_L20P_3
IP_L24N_3
IP_L24P_3
IP_L46N_3
IP_L46P_3
IP_L50N_3/VREF_3
IP_L50P_3
IP_L54N_3
IP_L54P_3
Pin Name
FGG676
Ball
AA3
AA2
AC1
AB1
AC3
AC2
AD2
AD1
W4
W3
W6
W7
W2
W1
G5
G1
G2
Y2
Y1
U8
U7
Y6
Y5
V6
V7
V8
U9
C1
C2
D1
D2
H4
K1
V4
U3
Y4
Y3
J2
J3
J1
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VREF
VREF
VREF
VREF
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
116