XC3SD3400A-5FG676C Xilinx Inc, XC3SD3400A-5FG676C Datasheet - Page 49

SPARTAN-3ADSP FPGA 3400K 676FBGA

XC3SD3400A-5FG676C

Manufacturer Part Number
XC3SD3400A-5FG676C
Description
SPARTAN-3ADSP FPGA 3400K 676FBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3A DSPr

Specifications of XC3SD3400A-5FG676C

Number Of Logic Elements/cells
53712
Number Of Labs/clbs
5968
Total Ram Bits
2322432
Number Of I /o
469
Number Of Gates
3400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
For Use With
122-1532 - KIT DEVELOPMENT SPARTAN 3ADSP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3SD3400A-5FG676C
Manufacturer:
XILINX
Quantity:
885
Part Number:
XC3SD3400A-5FG676C
Manufacturer:
Xilinx Inc
Quantity:
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Part Number:
XC3SD3400A-5FG676C
Manufacturer:
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0
DNA Port Timing
Table 43: DNA_PORT Interface Timing
DS610 (v3.0) October 4, 2010
Product Specification
Notes:
1.
T
T
T
T
The minimum READ pulse width is 5 ns, and the maximum READ pulse width is 10 μs.
T
T
T
Symbol
T
T
T
DNADCKO
DNACLKH
DNACLKF
DNACLKL
DNADSU
DNARSU
DNASSU
DNADH
DNARH
DNASH
Setup time on SHIFT before the rising edge of CLK
Hold time on SHIFT after the rising edge of CLK
Setup time on DIN before the rising edge of CLK
Hold time on DIN after the rising edge of CLK
Setup time on READ before the rising edge of CLK
Hold time on READ after the rising edge of CLK
Clock-to-output delay on DOUT after rising edge of CLK
CLK frequency
CLK High time
CLK Low time
Description
Spartan-3A DSP FPGA Family: DC and Switching Characteristics
www.xilinx.com
Min
1.0
0.5
1.0
0.5
5.0
0.0
0.5
0.0
1.0
1.0
10,000
Max
100
1.5
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
49

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