XC5VSX50T-1FF1136I Xilinx Inc, XC5VSX50T-1FF1136I Datasheet - Page 309
![IC FPGA VIRTEX-5 50K 1136FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VSX50T-1FF1136I
Manufacturer Part Number
XC5VSX50T-1FF1136I
Description
IC FPGA VIRTEX-5 50K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VSX50T-1FF1136I
Number Of Logic Elements/cells
52224
Number Of Labs/clbs
4080
Total Ram Bits
4866048
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1136-BBGA, FCBGA
For Use With
HW-V5-ML506-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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- XC5VLX30-1FFG324C PDF datasheet
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Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Table 6-40: Maximum Number of Simultaneously Switching Outputs per Bank (Continued)
Voltage
1.8V
LVCMOS18_2_slow
LVCMOS18_4_slow
LVCMOS18_6_slow
LVCMOS18_8_slow
LVCMOS18_12_slow
LVCMOS18_16_slow
LVCMOS18_2_fast
LVCMOS18_4_fast
LVCMOS18_6_fast
LVCMOS18_8_fast
LVCMOS18_12_fast
LVCMOS18_16_fast
LVDCI_18 50 Ω
HSTL_I_18
HSTL_I_DCI_18
HSTL_II_18
HSTL_II_DCI_18
HSTL_III_18
HSTL_III_DCI_18
HSTL_IV_18
HSTL_IV_DCI_18
SSTL18_I
SSTL18_I_DCI
SSTL18_II
SSTL18_II_DCI
HSLVDCI_18 50 Ω
DIFF_HSTL_I_18
DIFF_HSTL_I_DCI_18
DIFF_HSTL_II_18
DIFF_HSTL_II_DCI_18
DIFF_SSTL18_I
DIFF_SSTL18_I_DCI
DIFF_SSTL18_II
DIFF_SSTL18_II_DCI
IOSTANDARD
www.xilinx.com
Limit per 20-pin Bank
Simultaneous Switching Output Limits
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
17
17
10
10
20
20
20
20
20
20
20
20
20
20
20
20
20
Limit per 40-pin Bank
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
35
35
20
20
40
40
40
40
40
40
40
40
40
40
40
40
40
309
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