668-0003-C Rabbit Semiconductor, 668-0003-C Datasheet - Page 20

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668-0003-C

Manufacturer Part Number
668-0003-C
Description
IC CPU RABBIT2000 30MHZ 100PQFP
Manufacturer
Rabbit Semiconductor
Datasheet

Specifications of 668-0003-C

Rohs Status
RoHS non-compliant
Processor Type
Rabbit 2000 8-Bit
Speed
30MHz
Voltage
2.7V, 3V, 3.3V, 5V
Mounting Type
Surface Mount
Package / Case
100-MQFP, 100-PQFP
Features
-
Other names
316-1004
668-0003

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
668-0003-C
Manufacturer:
Rabbit Semiconductor
Quantity:
10 000
The Rabbit (and the Z80/Z180) processor has two accumulators—the A register serves as
an 8-bit accumulator for 8-bit operations such as
or and. The 16-bit register HL regis-
ADD
ter serves as an accumulator for 16-bit operations such as
, which adds the 16-
ADD HL,DE
bit register DE to the 16-bit accumulator HL. For many operations IX or IY can substitute
for HL as accumulators.
The register marked F is the flags register or status register. It holds a number of flags that
provide information about the last operation performed. The flag register cannot be
accessed directly except by using the
and
instructions. Normally the
POP AF
PUSH AF
flags are tested by conditional jump instructions. The flags are set to mark the results of
arithmetic and logic operations according to rules that are specified for each instruction.
There are four unused read/write bits in the flag register that are available to the user via
the
and
instructions. These bits should be used with caution since new-
PUSH AF
POP AF
generation Rabbit processors could use these bits for new purposes.
The registers IX, IY and HL can also serve as index registers. They point to memory
addresses from which data bits are fetched or stored. Although the Rabbit can address a
megabyte or more of memory, the index registers can only directly address 64K of mem-
ory (except for certain extended addressing LDP instructions). The addressing range is
expanded by means of the memory mapping hardware (see “Memory Mapping” on
page 15) and by special instructions. For most embedded applications, 64K of data mem-
ory (as opposed to code memory) is sufficient. The Rabbit can efficiently handle a mega-
byte of code space.
The register SP points to the stack that is used for subroutine and interrupt linkage as well
as general-purpose storage.
A feature of the Rabbit (and the Z80/Z180) is the alternate register set. Two special
instructions swap the alternate registers with the regular registers. The instruction
exchanges the contents of AF with AF'. The instruction
exchanges HL,
EX AF,AF'
EXX
DE, and BC with HL', DE', and BC'. Communication between the regular and alternate
register set in the original Z80 architecture was difficult because the exchange instructions
provided the only means of communication between the regular and alternate register sets.
The Rabbit has new instructions that greatly improve communication between the regular
and alternate register set. This effectively doubles the number of registers that are easily
available for the programmer’s use. It is not intended that the alternate register set be used
to provide a separate set of registers for an interrupt routine, and Dynamic C does not sup-
port this usage because it uses both registers sets freely.
The IP register is the interrupt priority register. It contains four 2-bit fields that hold a his-
tory of the processor’s interrupt priority. The Rabbit supports four levels of processor pri-
ority, something that exists only in a very restricted form in the Z80 or Z180.
14
Rabbit 2000 Microprocessor User’s Manual

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