668-0003-C Rabbit Semiconductor, 668-0003-C Datasheet - Page 82

• Manufacturer Part Number: 668-0003-C
• Description: IC CPU RABBIT2000 30MHZ 100PQFP
• Manufacturer: Rabbit Semiconductor

Specifications of 668-0003-C

• Rohs Status: RoHS non-compliant
• Processor Type: Rabbit 2000 8-Bit
• Speed: 30MHz
• Voltage: 2.7V, 3V, 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Features: -
• Other names: 316-1004; 668-0003

The doubled clock is created by xor’ing the delayed and inverted clock with itself. If the
original clock does not have a 50-50 duty cycle, then alternate clocks will have a slightly
different length. Since the duty cycle of the built-in oscillator can be as asymmetric as 52-
48, the clock generated by the clock doubler will exhibit up to a 4% variation in period on
alternate clocks. This does not affect the no-wait states memory access time since two
adjacent clocks are always used. However, the maximum allowed clock speed must be
reduced by 10% if the clock is supplied via the clock doubler. The only signals clocked on
the falling edge of the clock are the memory and I/O write pulses, and these have noncriti-
cal timing. Thus the length of the clock low time is noncritical as long as it is not so long
as to shorten the clock high time excessively, which could make the write pulse too short
for the memory used. This is unlikely to happen with practical clock speeds and typical
static RAM memories.
The power consumption is proportional to the clock frequency, and for this reason power
can be reduced by slowing the clock when less computing activity is taking place. The
clock doubler provides a convenient method of temporarily speeding up or slowing down
the clock as part of a power management scheme.
7.4 Controlling Power Consumption
The processor power consumption can be traded against speed by slowing the system
clock, adding wait states, using low-power-consumption instructions, and for maximum
power savings disabling the main system oscillator and using the real-time clock oscillator
to provide the clock. The following power saving features can be enabled.
• Add memory wait states for instruction fetching. Total wait states are programmable as
• If the clock doubler is not already in use, divide both the processor and the peripheral
• If the clock doubler is in use, turn it off, dividing both processor and peripheral by 2.
• Divide the processor and/or peripheral clock by 8.
• Run code in RAM rather than flash memory.
• Switch the processor and peripheral clock to the 32.768 kHz oscillator and, if desired,
• Execute a low-power instruction loop consisting mostly of instructions that don’t use
It is anticipated that these measures would reduce current consumption to as low as 25 µA
plus some leakage that would be significant at high operating temperatures.
76
0, 1, 2 or 4. Generally two wait states should use half the power of zero wait states.
clock by 4. This is permissible if nothing, particularly timers and serial ports, depends
on the peripheral clock.
disable the main oscillator.
much power. The best choice is successive mul instructions that multiply 0 x 0. No
intervening instructions are needed to load the terms to be multiplied after the first mul
since all registers involved stay at zero.
Rabbit 2000 Microprocessor User’s Manual