Z84C2008PEG Zilog, Z84C2008PEG Datasheet - Page 66

• Manufacturer Part Number: Z84C2008PEG
• Description: IC 8MHZ Z80 CMOS PIO 40-DIP
• Manufacturer: Zilog
• Series: Z80r

Specifications of Z84C2008PEG

• Processor Type: Z80
• Features: Low Power CMOS
• Speed: 8MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 40-DIP (0.620", 15.75mm)
• Cpu Speed: 8MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Supply Voltage Range: 5V
• Operating Temperature Range: -40°C To +100°C
• Svhc: No SVHC (18-Jun-2010)
• Rohs Compliant: Yes
• Processor Series: Z84C2xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 100 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Base Number: 84
• Clock Frequency: 8MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

46
UM008005-0205
Z80 CPU
User’s Manual
Extended Addressing
Extended Addressing provides for two bytes (16 bits) of address to be
included in the instruction. This data can be an address to which a
program can jump or it can be an address where an operand is located.
Extended addressing is required for a program to jump from any location
in memory to any other location, or load and store data in any memory
location.
During extended addressing use, specify the source or destination address
of an operand. This notation (
memory at
The two bytes of address
The use of the parentheses always means that the value enclosed within
them is used as a pointer to a memory location. For example, (3200)
refers to the contents of memory at location 1200.
Indexed Addressing
In this type of addressing, the byte of data following the Op Code
contains a displacement that is added to one of the two index registers (the
Op Code specifies which index register is used) to form a pointer to
memory. The contents of the index register are not altered by this
operation.
An example of an indexed instruction is to load the contents of the
memory location (Index Register + Displacement) into the accumulator.
Op Code
Low Order Address to Low Order Operand
High Order Address to Low Order Operand
Displacement
Op Code
Op Code
nn
Operand added to index register
to form a pointer to memory
Two Byte Op Code
, where
nn
is the 16-bit address specified in the instruction.
nn
are used as a pointer to a memory location.
nn
) is used to indicate the content of
One or
Two Bytes
Z80 CPU Instruction Description