Z84C2008PEG Zilog, Z84C2008PEG Datasheet - Page 98

IC 8MHZ Z80 CMOS PIO 40-DIP

Z84C2008PEG

Manufacturer Part Number
Z84C2008PEG
Description
IC 8MHZ Z80 CMOS PIO 40-DIP
Manufacturer
Zilog
Series
Z80r
Datasheets

Specifications of Z84C2008PEG

Processor Type
Z80
Features
Low Power CMOS
Speed
8MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Cpu Speed
8MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
-40°C To +100°C
Svhc
No SVHC (18-Jun-2010)
Rohs Compliant
Yes
Processor Series
Z84C2xx
Core
Z80
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
16
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 100 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Base Number
84
Clock Frequency
8MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z84C2008PEG
Manufacturer:
Zilog
Quantity:
20
78
UM008005-0205
Z80 CPU
User’s Manual
(
condition is determined by examining the sign bits of the operands.
For addition, operands with different signs never cause Overflow. When
adding operands with like signs and the result has a different sign, the
Overflow Flag is set, for example:
The two numbers added together resulted in a number that exceeds
and the two positive operands have resulted in a negative number (-
which is incorrect. The Overflow Flag is therefore set.
For subtraction, Overflow can occur for operands of unlike signs. Operands
of like signs never cause Overflow. For example:
The minuend sign has changed from a Positive to a negative, giving an
incorrect difference. Overflow is set.
Another method for identifying an Overflow is to observe the Carry to and
out of the sign bit. If there is a Carry in and no Carry out, or if there is no
Carry in and a Carry out, then Overflow has occurred.
This flag is also used with logical operations and rotate instructions to
indicate the resulting parity is Even. The number of
counted. If the total is Odd, ODD parity is flagged (P =
Even, EVEN parity is flagged (P =
During search instructions (
instructions (
+120
+105
+225
(-)
+127
+127
+191
) or is less than the minimum possible number (–
-64
=
=
=
LDI
0111
1100
1011
0111
0110
1110
,
LDIR
1000
1001
0001
,
1111
0000
1111
LDD
CPI
,
LDDR
,
ADDEND
AUGEND
(-95)
MINUEND
SUBTRAHEND
DIFFERENCE
CPIR
1
), the P/V Flag monitors the state of the
).
,
CPD
,
CPDR
SUM
) and block transfer
1
bits in a byte are
128
0
Z80 Instruction Set
). If the total is
). This Overflow
+127
95
),

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