MC68EC000EI12 Freescale Semiconductor, MC68EC000EI12 Datasheet - Page 29

• Manufacturer Part Number: MC68EC000EI12
• Description: IC MPU 32BIT 12MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: 68K - M680X0r

Specifications of MC68EC000EI12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 12MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 12MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Introduction
1.6.1 Normalized Numbers
Normalized numbers encompass all numbers with exponents laying between the maximum
and minimum values. Normalized numbers can be positive or negative. For normalized
numbers in single and double precision the implied integer bit is one. In extended precision,
the mantissa’s MSB, the explicit integer bit, can only be a one (see Figure 1-13); and the
exponent can be zero.
1.6.2 Denormalized Numbers
Denormalized numbers represent real values near the underflow threshold. The detection
of the underflow for a given data format and operation occurs when the result’s exponent is
less than or equal to the minimum exponent value. Denormalized numbers can be positive
or negative. For denormalized numbers in single and double precision the implied integer
bit is a zero. In extended precision, the mantissa’s MSB, the explicit integer bit, can only be
a zero (see Figure 1-14).
Traditionally, the detection of underflow causes floating-point number systems to perform a
"flush-to-zero". This leaves a large gap in the number line between the smallest magnitude
normalized number and zero. The IEEE 754 standard implements gradual underflows: the
result mantissa is shifted right (denormalized) while the result exponent is incremented until
reaching the minimum value. If all the mantissa bits of the result are shifted off to the right
during this denormalization, the result becomes zero. Usually a gradual underflow limits the
potential underflow damage to no more than a round-off error. This underflow and
denormalization description ignores the effects of rounding and the user-selectable
rounding modes. Thus, the large gap in the number line created by "flush-to-zero" number
systems is filled with representable (denormalized) numbers in the IEEE "gradual
underflow" floating-point number system.
Since the extended-precision data format has an explicit integer bit, a number can be
formatted with a nonzero exponent, less than the maximum value, and a zero integer bit.
The IEEE 754 standard does not define a zero integer bit. Such a number is an
unnormalized number. Hardware does not directly support denormalized and unnormalized
numbers, but implicitly supports them by trapping them as unimplemented data types,
allowing efficient conversion in software.
1-18
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
SIGN OF MANTISSA, 0 OR 1
MIN < EXPONENT < MAX
SIGN OF MANTISSA, 0 OR 1
Figure 1-14. Denormalized Number Format
Figure 1-13. Normalized Number Format
EXPONENT = 0
MANTISSA = ANY NONZERO BIT PATTERN
.
.
MANTISSA = ANY BIT PATTERN
MOTOROLA