MC68EC000EI12 Freescale Semiconductor, MC68EC000EI12 Datasheet - Page 497

• Manufacturer Part Number: MC68EC000EI12
• Description: IC MPU 32BIT 12MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: 68K - M680X0r

Specifications of MC68EC000EI12

• Processor Type: M680x0 32-Bit
• Speed: 12MHz
• Voltage: 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Core Size: 32 Bit
• Cpu Speed: 12MHz
• Digital Ic Case Style: PLCC
• No. Of Pins: 68
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +70°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Clock Frequency: 12MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

PLOAD
Operation:
Assembler
Syntax:
Attributes:
Description: For the MC68851, PLOAD searches the translation table for a translation of
MOTOROLA
the specified effective address. If one is found, it is flushed from the address translation
cache, and an entry is made as if a bus master had run a bus cycle. Used and modified
bits in the table are updated as part of the table search. The MC68851 ignores the
logical bus arbitration signals during the flush and load phases at the end of this
instruction. This prevents the possibility of an entry temporarily disappearing from the
address translation cache and causing a false table search.
This instruction will cause a paged memory management unit illegal operation excep-
tion (vector $39) if the E-bit of the translation control register is clear.
The function code for this operation may be specified to be:
1. Immediate—The function code is specified as four bits in the command word.
2. Data Register—The function code is contained in the lower four bits in the
3. Source Function Code (SFC) Register—The function code is in the CPU SFC
4. Destination Function Code (DFC) Register—The function code is in the CPU
MC68020 data register specified in the instruction.
register. Since the SFC of the MC68020 has only three implemented bits, only
function codes $0D$7 can be specified in this manner.
DFC register. Since the DFC of the MC68020 has only three implemented bits,
only function codes $0D$7 can be specified in this manner.
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
If Supervisor State
Else TRAP
PLOADR FC, < ea >
PLOADW FC, < ea >
Unsized
Then Search Translation Table and Make Address Translation
Cache Entry for Effective Address
Load an Entry into the ATC
(MC68030 only, MC68851)
Supervisor (Privileged) Instructions
PLOAD
6-43