MC68EC040RC25A Freescale Semiconductor, MC68EC040RC25A Datasheet - Page 238

• Manufacturer Part Number: MC68EC040RC25A
• Description: IC MPU 32BIT 25MHZ 179-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 179-PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

CP—Continuation of Floating-Point Post-Instruction Exception Pending
CU—Continuation of Unimplemented Floating-Point Instruction Exception Pending
CT—Continuation of Trace Exception Pending
CM—Continuation of MOVEM Instruction Execution Pending
MA—Misaligned Access
MOTOROLA
CP is set for an access error with a floating-point post-instruction exception pending. All
pending accesses are allowed to complete after a trace condition is recognized. If any
of these accesses fault, the resulting stack frame has the CT bit set, and the effective
address field contains the address of the instruction being traced. The RTE fetches the
appropriate floating-point post-instruction exception vector.
When a post-instruction exception occurs during tracing, the post-instruction exception
takes precedence. CP is set, and CT = 0 and can be traced. The kernel must check for
a trace condition using the stacked SR. The effective address field contains the
calculated effective address determined by the effective address field of the floating-
point instruction that caused the post-instruction exception.
CU is set for an access error with a pending exception for an unimplemented floating-
point instruction. Operation is the same as for the CP flag except the RTE fetches the
F-line exception vector. The effective address field contains the calculated effective
address determined by the effective address field of the unimplemented instruction.
When an unimplemented floating-point instruction is traced, the unimplemented
exception takes precedence, CU is set, and CT = 0. The kernel must check for a trace
condition using the stacked SR. If this condition is true, create the required stack frame
and jump directly to the trace handler.
CT is set for an access error with a pending trace exception. Operation is the same as
for the CP flag. When RTE is executed with CT set, the M68040 will move the words on
the stack an offset of $00–$0B from the current SP to offset $30–$3B, adjusting the
stack pointer by +$30. The M68040 changes the stack frame format to $2 before
fetching the trace exception vector and jumping directly to trace exception handling.
This stack adjustment creates the stack frame that normally would have been created
for the trace exception had the pending access not encountered a bus error.
CM is set if a data access encounters a bus error for a MOVEM. Since the MOVEM
operation can write over the memory location or registers used to calculate the effective
address, the M68040 internally saves the effective address after calculation. When
MOVEM encounters a bus error, a stack frame is created with CM set, and the effective
address field contains the calculated effective address for the instruction. When RTE is
executed, MOVEM restarts using the effective address on the stack (instead of
repeating the effective address calculate operation) if the address mode is PC relative
(mode = 111, register = 010 or 011) or indirect with index (mode = 110).
MA is set if an ATC fault occurs for second-page access that spans two pages in
memory.
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M68040 USER’S MANUAL
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