MC68EC040RC25A Freescale Semiconductor, MC68EC040RC25A Datasheet - Page 407

• Manufacturer Part Number: MC68EC040RC25A
• Description: IC MPU 32BIT 25MHZ 179-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 179-PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

The test logic also includes an instruction shift register and two test data registers, a
boundary scan register and a bypass register. The boundary scan register links all device
signal pins into a chain that can be controlled by the 3-bit instruction shift register.
C.6.1 Instruction Shift Register
The MC68040V and MC68EC040V IEEE standard 1149.1A implementations include a 3-
bit instruction shift register without parity. The register shifts one of six instructions, which
can either select the test to be performed or access a test data register, or both. Data is
transferred from the instruction shift register to latched decoded outputs during the
update-IR state. The instruction shift register is reset to all ones in the TAP controller test-
logic-reset state, which is equivalent to selecting the BYPASS instruction. During the
capture-IR state, the binary value 001 is loaded into the parallel inputs of the instruction
shift register.
The MC68040V and MC68EC040V IEEE standard 1149.1A implementations include three
mandatory standard public instructions (BYPASS, SAMPLE/PRELOAD, and EXTEST),
two optional public standard instructions, and one manufacturer's private instruction. The
five public instructions provide the capability to disable all device output drivers, operate
the device in a BYPASS configuration, and conduct boundary scan test operations. Table
C-3 lists the three bits used in the instruction shift register to decode the instructions and
MOTOROLA
TDI—A test data input with an internal pullup resistor sampled on the rising edge of
TDO—A three-state test data output actively driven only in the shift-IR and shift-DR
TCK.
Figure C-4. MC68040V and MC68EC040V Test Logic Block Diagram
controller states that changes on the falling edge of TCK.
TMS
TCK
TDI
Freescale Semiconductor, Inc.
For More Information On This Product,
187
188-BIT BOUNDARY SCAN REGISTER
BYPASS
2
Go to: www.freescale.com
3-BIT INSTRUCTION SHIFT REGISTER
M68040 USER’S MANUAL
TEST DATA REGISTERS
LATCHED DECODER
0
0
TDO
C-11