MC68EC040RC25A Freescale Semiconductor, MC68EC040RC25A Datasheet - Page 366

• Manufacturer Part Number: MC68EC040RC25A
• Description: IC MPU 32BIT 25MHZ 179-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EC040RC25A

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 179-PGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

A.5.2 MC68LC040 Stack Frames
When the processor executes an RTE instruction, it examines the stack frame on top of the
active supervisor stack to determine if it is a valid frame and what type of context restoration
it requires. The MC68LC040 provides five different stack frames for exception processing
and allows for an MC68040-specific stack frame. The set of frames includes four- and
six-word stack frames, a four-word throwaway stack frame, an access error stack frame, and
a new eight-word unimplemented floating-point stack frame. The stack frame that the
MC68040 can generate and the MC68LC040 can process is the floating-point post-instruc-
tion stack frame. Refer to Section 8 Exception Processing for details about exception
stack frames.
A-6
MC68LC040
3. The processor begins exception processing for the unimplemented floating-point in-
a pending unimplemented floating-point instruction exception. The access error ex-
ception handler then completes the write-backs in software, and exception processing
for the unimplemented floating-point instruction exception begins immediately after re-
turn from the access error handler.
struction by making an internal copy of the current SR. The processor then enters the
supervisor mode and clears the trace bits (T1 and T0). It creates a format $4 stack
frame and saves the internal copy of the SR, PC, vector offset, calculated effective ad-
dress, and PC value of the faulted instruction in the stack frame.
The effective address field of the format $4 stack frame contains the calculated effec-
tive address of the operand for the faulted floating-point instruction using the address-
ing mode in which the effective address is calculated. For immediate and register
direct addressing modes, this field is $0. The saved PC value is the logical address of
the instruction that follows the unimplemented floating-point instruction. This value will
be restored during RTE execution. The vector offset format number ($4) is used for
this eight-word stack frame. Note that an MC68040 cannot correctly handle a stack for-
mat $4. The PC of the faulted instruction contains a long-word PC of the floating-point
instruction that caused the trap to occur. The information is provided so that the in-
struction is available for software emulation of floating-point instructions. The proces-
sor generates exception vector number 11 for the unimplemented F-line instruction
exception vector, fetches the address of the F-line exception handler from the excep-
tion vector table, and begins execution of the handler after prefetching instructions to
fill the pipeline. Refer to Section 8 Exception Processing for details about exception
processing.
REV2.3 (01/29/2000)
Stack Frames
Table 12-1. Eight-Word Stack Frame (Format $4)
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M68040 USER’S MANUAL
Exception Types
Stacked PC Points To
MOTOROLA