MC68MH360ZP25VL Freescale Semiconductor, MC68MH360ZP25VL Datasheet - Page 140

• Manufacturer Part Number: MC68MH360ZP25VL
• Description: IC MPU QUICC ETHER 25MHZ 357PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

As with the S/T interface example, the U interface must be configured in slave mode with
the DCL and FSC signals provided to both the QUICC32 and the U interface.
In slave mode, the FSX and FSR signals of the MC145572 must be connected together.
There are no DREQ/DGRANT signals on the U interface.
C.3 Data Clock (DCL) and Frame Sync (FSC)
The main consideration when connecting multiple interfaces to the same physical medium
is the clock and frame sync generation.
As stated earlier, the QUICC32 does not provide DCL and FSC signals. The U or S/T
interface could be configured in master mode on the IDL bus and generate both DCL and
FSC synchronized to the line-interface signal.
To have all the B- and D channels of a multi-interface system synchronized on the same
TDM bus, only one S/T or U interface should be configured as master to provide common
DCL and FSC signals to the QUICC32 and all other interfaces.
Figure C-3. IDL and SCP Connections between the QUICC32 and the U Interface
Generation
QUICC32
Freescale Semiconductor, Inc.
L1SYNC
L1CLKx
L1RXDx
L1TXDx
SPICLK
For More Information On This Product,
SPIRX
SPITX
GPI/O
IRQ
Go to: www.freescale.com
QMC Supplement
*
Pullup resistors on SCPEN and IRQ pins
are not represented.
DCL
DIN
DOUT
FSX
FSR
IRQ
SCPEN
SCPCLK
SCPRX
SCPTX
MC145572
U Chip
ISDN
NT/LT
M/S
Line
Interface
VCC
GND