MPC180LMB Freescale Semiconductor, MPC180LMB Datasheet - Page 93

• Manufacturer Part Number: MPC180LMB
• Description: IC SECURITY PROCES 66MHZ 100LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MPC180LMB

• Processor Type: Security Processor
• Speed: 66MHz
• Voltage: 1.8V
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

M
L
Latency. The number of clock cycles necessary to execute an instruction and
Least-significant bit (lsb). The bit of least value in an address, register, data
Least-significant byte (LSB). The byte of least value in an address, register,
Little-endian. A byte-ordering method in memory where the address n of a
Masking. Hiding internal interrupts and signals from the external interface
MD4. Message Digest 4. Hashing algorithm developed by Rivest which
MD5. Message Digest 5. Hashing algorithm developed by Rivest which pads
MDEU. Message Digest Execution Unit. A device or silicon block which
Memory-mapped accesses. Accesses whose addresses use the page or block
Message Authentication Code (MAC). A MAC is a function that takes a
Message Digest. The result of applying a hash function to a message.
Modular arithmetic. A form of arithmetic where integers are considered
Modulus. The integer used to divide out by in modular arithmetic.
make ready the results of that execution for a subsequent instruction.
element, or instruction encoding.
data element, or instruction encoding.
word corresponds to the least-significant byte. In an addressed
memory word, the bytes are ordered (left to right) 3, 2, 1, 0, with 3
being the most-significant byte. See Big-endian.
via control registers.
processes a series of 512-bit message blocks and produces a single
128-bit Hash representing the original message.
(if necessary) the message to be hashed to create a 512 bit block. This
block is compressed by XOR-ing two inputs: the 512-bit message
block, and a 128-bit key. Stronger than MD.
accelerates the hashing functions associated with message
authentication.
address translation mechanisms provided by the MMU and that
occur externally with the bus protocol defined for memory.
variable length input and a key to produce a fixed-length output. See
also hash-based MAC, stream-cipher based MAC, and block-cipher
based MAC.
equal if they leave the same remainder when divided by the modulus.
Freescale Semiconductor, Inc.
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