MPC8321ECZQAFDC Freescale Semiconductor, MPC8321ECZQAFDC Datasheet - Page 41

• Manufacturer Part Number: MPC8321ECZQAFDC
• Description: IC MPU PWRQUICC II 516-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8321ECZQAFDC

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 333MHz
• Voltage: 1V
• Mounting Type: Surface Mount
• Package / Case: 516-PBGA
• Processor Series: MPC8xxx
• Core: e300
• Data Bus Width: 32 bit
• Development Tools By Supplier: MPC8323E-MDS-PB
• Maximum Clock Frequency: 333 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Ram Size: 16 KB
• I/o Voltage: 1.8 V, 3.3 V
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 333MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1V
• Operating Supply Voltage (max): 1.05V
• Operating Supply Voltage (min): 0.95V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 516
• Package Type: TEBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 31
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 31
Figure 32
17 TDM/SI
This section describes the DC and AC electrical specifications for the time-division-multiplexed and serial
interface of the MPC8323E.
17.1
Table 46
Freescale Semiconductor
Output high voltage
Output low voltage
Input high voltage
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
Note: The clock edge is selectable on SPI.
Note: The clock edge is selectable on SPI.
provides the DC electrical characteristics for the MPC8323E TDM/SI.
SPICLK (Output)
TDM/SI DC Electrical Characteristics
and
shows the SPI timing in slave mode (external clock).
shows the SPI timing in master mode (internal clock).
Output Signals:
SPICLK (Input)
Output Signals:
Input Signals:
Input Signals:
Characteristic
Figure 32
(See Note)
(See Note)
(See Note)
(See Note)
SPIMOSI
SPIMISO
SPIMISO
SPIMOSI
Figure 32. SPI AC Timing in Master Mode (Internal Clock) Diagram
Figure 31. SPI AC Timing in Slave Mode (External Clock) Diagram
represent the AC timing from
t
NEIVKH
Table 46. TDM/SI DC Electrical Characteristics
t
NIIVKH
Symbol
V
V
V
OH
OL
IH
t
NIKHOV
t
NIIXKH
t
NEKHOV
t
NEIXKH
I
OH
Table
I
OL
Condition
= –2.0 mA
= 3.2 mA
—
45. Note that although the specifications
Min
2.4
2.0
—
OV
DD
Max
0.5
—
+ 0.3
Unit
TDM/SI
V
V
V
41