UDA1355H/N2,518 NXP Semiconductors, UDA1355H/N2,518 Datasheet - Page 10

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UDA1355H/N2,518

Manufacturer Part Number
UDA1355H/N2,518
Description
IC CODEC STER/SUDIO SPDIF 44QFP
Manufacturer
NXP Semiconductors
Type
Stereo Audior
Datasheet

Specifications of UDA1355H/N2,518

Data Interface
I²C, Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
97 / 98
Voltage - Supply, Analog
2.7 V ~ 5.5 V
Voltage - Supply, Digital
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935271552518

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UDA1355H/N2,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
7
7.1
The UDA1355H can be controlled either via static pins or
via the microcontroller serial hardware interface being the
I
clock up to 2 MHz. It is recommended to use the
microcontroller interface since this gives full access to all
the IC features.
The two microcontroller interfaces only differ in interface
format. The register addresses and features that can be
controlled are identical for L3-bus mode and I
mode.
The UDA1355H can operate in three control modes:
• Static mode with limited features
• L3-bus mode with full featuring
• I
The modes are selected via the 3-level pin SEL_STATIC
according to Table 2.
2003 Apr 10
2
handbook, full pagewidth
C-bus with a clock up to 400 kHz or the L3-bus with a
Stereo audio codec with SPDIF interface
2
C-bus mode with full featuring.
FUNCTIONAL DESCRIPTION
IC control
SPDIFOUT
CLK_OUT
DATAO
DATAI
V DDE
BCKO
LOCK
V SSE
BCKI
WSO
WSI
10
11
2
3
4
5
6
7
1
8
9
2
C-bus
Fig.2 Pin configuration.
UDA1355H
10
Table 2 Control mode selection via pin SEL_STATIC
7.2
The UDA1355H has a microcontroller interface and all the
sound processing features and system settings can be
controlled by the microcontroller.
The controllable settings are:
• Restoring L3-bus defaults
• Power-on settings for all blocks
• Digital interface input and output formats
• Volume settings for the decimator
• PGA gain settings
Microcontroller interface
LEVEL
HIGH
LOW
MID
28
MGU828
33
32
31
30
29
27
26
25
24
23
V ADCN
V ADCP
MP2
MP1
MP0
V SSIS
V DDI
SPDIF3
SPDIF2
SPDIF1
SPDIF0
Preliminary specification
I
L3-bus mode
2
static mode
C-bus mode
UDA1355H
MODE

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