UCB1400BE,151 NXP Semiconductors, UCB1400BE,151 Datasheet - Page 53

IC AUDIO CODEC 3.3V 48-LQFP

UCB1400BE,151

Manufacturer Part Number
UCB1400BE,151
Description
IC AUDIO CODEC 3.3V 48-LQFP
Manufacturer
NXP Semiconductors
Type
Audio Codec '97r
Datasheet

Specifications of UCB1400BE,151

Package / Case
48-LQFP
Data Interface
Serial
Resolution (bits)
20 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
No
S/n Ratio, Adcs / Dacs (db) Typ
97 / 91
Voltage - Supply, Analog
3 V ~ 3.6 V
Voltage - Supply, Digital
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935269304151
UCB1400BE-SNXP
UCB1400BE-SNXP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UCB1400BE,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
16. AC Link characteristics
Table 61:
DV
9397 750 09611
Product data
Symbol
Cold/warm reset
T
T
T
T
AC-link clocks
T
T
T
T
T
T
Data setup and hold
t
T
T
Trise
Tfall
Trise
Tfall
Trise
Tfall
Trise
Tfall
AC-link low power mode
T
ATE test mode
T
T
co
rst_low
rst2clk
sync_high
sync2clk
clk_period
clk_high
clk_low
sync_period
sync_high
sync_low
setup
hold
s2_pdown
setup2rst
off
DD
clk
sync
din
dout
clk
sync
din
dout
= AV
DD
Characteristics
Parameter
RESET active-LOW pulse width (AC Link
controller)
RESET inactive to BIT_CLK start-up delay
SYNC active-HIGH pulse width (AC Link
controller)
SYNC inactive to BIT_CLK start-up delay
BIT_CLK frequency
BIT_CLK period
BIT_CLK output jitter
BIT_CLK HIGH pulse width
BIT_CLK LOW pulse width
SYNC frequency
SYNC period
SYNC HIGH pulse width
SYNC LOW pulse width
Output delay from rising edge of BIT_CLK
Input setup to falling edge of BIT_CLK
Input hold from falling edge of BIT_CLK
BIT_CLK rise time
BIT_CLK fall time
SYNC rise time
SYNC fall time
SDATA_IN rise time
SDATA_IN fall time
SDATA_OUT rise time
SDATA_OUT fall time
End of Slot 2 to BIT_CLK, SDATA_IN LOW
Setup to trailing edge of RESET (AC Link
controller)
Rising edge of RESET to Hi-Z delay
= V
ADCP
= 3.3 V; T
amb
= 25 C; all voltage measured with respect to ground; unless otherwise specified.
Rev. 02 — 21 June 2002
Conditions
Audio codec with touch screen controller
Min
1.0
162.8
1.0
162.8
-
-
-
36
36
-
-
-
-
-
10
10
-
-
-
-
-
-
-
-
-
15
-
and power management monitor
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Typ
-
-
-
12.288
81.4
-
40.7
40.7
48.0
20.8
1.3
19.5
-
-
-
-
-
-
-
-
-
-
-
-
-
0.65
UCB1400
Max
-
-
-
-
-
750
45
45
-
-
-
-
15
-
-
10
10
6
6
10
10
6
6
-
-
25
53 of 63
Unit
ns
ns
MHz
ns
ps
ns
ns
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s

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