ENC28J60-I/SS Microchip Technology, ENC28J60-I/SS Datasheet - Page 48

• Manufacturer Part Number: ENC28J60-I/SS
• Description: IC ETHERNET CTRLR W/SPI 28SSOP
• Manufacturer: Microchip Technology

Specifications of ENC28J60-I/SS

• Package / Case: 28-SSOP
• Controller Type: Ethernet Controller, MAC/10Base-T
• Interface: SPI
• Voltage - Supply: 3.1 V ~ 3.6 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Input Voltage Range (max): 2.25 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Supply Current (max): 180 mA
• Package: 28SSOP
• Standard Supported: IEEE 802.3
• Communication Mode: Full Duplex|Half Duplex
• Network Interface: MII|MIIM
• Data Rate: 10 Mbps
• Host Interface: SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ENC28J60
TABLE 7-4:
DS39662C-page 46
EIE
EIR
ESTAT
ECON2
ECON1
ERXSTL
ERXSTH
ERXNDL
ERXNDH
ERXRDPTL
ERXRDPTH
ERXFCON
EPKTCNT
MACON1
MACON3
MAMXFLL
MAMXFLH
Legend:
Note 1:
Register
Name
— = unimplemented, r = reserved bit. Shaded cells are not used.
CLKRDY resets to ‘0’ on Power-on Reset but is unaffected on all other Resets.
RX Start Low Byte (ERXST<7:0>)
RX End Low Byte (ERXND<7:0>)
RX RD Pointer Low Byte (ERXRDPT<7:0>)
Ethernet Packet Count
Maximum Frame Length Low Byte (MAMXFL<7:0>)
Maximum Frame Length High Byte (MAMXFL<15:8>)
PADCFG2
AUTOINC
TXRST
UCEN
INTIE
Bit 7
INT
—
—
—
—
—
SUMMARY OF REGISTERS USED FOR PACKET RECEPTION
PADCFG1
PKTDEC
ANDOR
BUFER
RXRST
PKTIE
PKTIF
Bit 6
—
—
—
—
PADCFG0
PWRSV
DMAST
CRCEN
DMAIE
DMAIF
Bit 5
—
—
—
—
r
RX Start High Byte (ERXST<12:8>)
RX End High Byte (ERXND<12:8>)
RX RD Pointer High Byte (ERXRDPT<12:8>)
TXCRCEN
LATECOL
CSUMEN
Preliminary
LINKIE
LINKIF
PMEN
Bit 4
r
r
PHDREN
TXPAUS
TXRTS
MPEN
VRPS
TXIE
Bit 3
TXIF
—
HFRMEN
RXBUSY
RXPAUS
RXEN
HTEN
Bit 2
—
r
r
FRMLNEN
PASSALL
TXABRT
TXERIE
TXERIF
BSEL1
© 2008 Microchip Technology Inc.
MCEN
Bit 1
—
CLKRDY
MARXEN
FULDPX
RXERIE
RXERIF
BSEL0
BCEN
Bit 0
—
(1)
on page
Values
Reset
13
13
13
13
13
13
13
13
13
13
13
14
14
14
14
14
14