LAN91C96-MU SMSC, LAN91C96-MU Datasheet - Page 3

IC ETHERNET CTLR MAC PHY 100TQFP

LAN91C96-MU

Manufacturer Part Number
LAN91C96-MU
Description
IC ETHERNET CTLR MAC PHY 100TQFP
Manufacturer
SMSC
Datasheet

Specifications of LAN91C96-MU

Controller Type
Ethernet Controller (IEEE 802.3)
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1018

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Manufacturer
Quantity
Price
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LAN91C96-MU
Manufacturer:
SMSC
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Manufacturer:
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Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
Table of Contents
CHAPTER 1 GENERAL DESCRIPTION ..................................................................... 7
CHAPTER 2 OVERVIEW ............................................................................................. 8
CHAPTER 3 PIN CONFIGURATIONS....................................................................... 11
3.1
CHAPTER 4 DESCRIPTION OF PIN FUNCTIONS ................................................... 17
4.1
CHAPTER 5 FUNCTIONAL DESCRIPTION .............................................................. 23
5.1
5.2
5.3
5.4
5.5
5.6
CHAPTER 6 FRAME FORMAT IN BUFFER MEMORY FOR ETHERNET ............... 38
CHAPTER 7 REGISTERS MAP IN I/O SPACE ......................................................... 42
7.1
7.2
CHAPTER 8 THEORY OF OPERATION ................................................................... 65
8.1
8.2
8.3
CHAPTER 9 FUNCTIONAL DESCRIPTION OF THE BLOCKS................................ 79
SMSC LAN91C96 5v&3v
Local Bus vs. PCMCIA vs. 68000 Pin Requirements...................................................................................15
Buffer Symbols................................................................................................................................................21
Buffer Memory................................................................................................................................................24
Interrupt Structure.........................................................................................................................................31
Reset Logic.......................................................................................................................................................32
Power Down Logic States...............................................................................................................................32
LAN91C96 Power Down States .....................................................................................................................33
PCMCIA CONFIGURATION REGISTERS DESCRIPTION ..................................................................36
I/O Space Access .............................................................................................................................................42
I/O Space Registers Description ....................................................................................................................42
Typical Flow of Events for Transmit (Auto Release = 0) ............................................................................67
Typical Flow of Events for Transmit (Auto Release = 1) ............................................................................68
Flow of Events for Receive .............................................................................................................................69
DATASHEET
Page 3
Revision 1.0 (10-24-08)

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