DP83902AVLJ National Semiconductor, DP83902AVLJ Datasheet - Page 17

• Manufacturer Part Number: DP83902AVLJ
• Description: IC CTRLR SER NETWORK IN 100PQFP
• Manufacturer: National Semiconductor

Specifications of DP83902AVLJ

• Controller Type: Serial Network Interface Controller
• Interface: Serial
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 140mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: *DP83902AVLJ

7 0 Packet Reception
Buffer Ring Overflow
If the Buffer Ring has been filled and the DMA reaches the
Boundary Pointer Address reception of the incoming pack-
et will be aborted by the ST-NIC Thus the packets previ-
ously received and still contained in the Ring will not be
destroyed
In heavily loaded network which cause overflows of the Re-
ceive Buffer Ring the ST-NIC may disable the local DMA
and suspend further receptions even if the Boundary regis-
ter is advanced beyond the Current register To guarantee
this will not happen a software reset must be issued during
all Receive Buffer Ring overflows (indicated by the OVW bit
in the Interrupt Status Register) The following procedure is
required to recover from a Receiver Buffer Ring Overflow
If this routine is not adhered to the ST-NIC may act in an
unpredictable manner It should also be noted that it is not
permissible to service an overflow interrupt by continuing to
empty packets from the receive buffer without implementing
the prescribed overflow routine A flow chart of the ST-NIC’s
overflow routine follows
Note It is necessary to define a variable in the driver which will be called
1 Read and store the value of the TXP bit in the ST-NIC
2 Issue the STOP command to the ST-NIC This is accom-
3 Wait for at least 1 6 ms Since the ST-NIC will complete
4 Clear the ST-NIC’s Remote Byte Count registers
5 Read the stored value of the TXP bit from step 1 above
Command Register
plished by setting the STP bit in the ST-NIC’s Command
Register Writing 21H to the Command Register will stop
the ST-NIC
any transmission or reception that is in progress it is
necessary to time out for the maximum possible duration
of an Ethernet transmission or reception By waiting
1 6 ms this is achieved with some guard band added
Previously it was recommended that the RST bit of the
Interrupt Status Register be polled to insure that the
pending transmission or reception is completed This bit
is not a reliable indicator and subsequently should be
ignored
(RBCR0 and RBCR1)
If this value is a 0 set the ‘‘Resend’’ variable to a 0 and
jump to step 6
If this value is a 1 read the ST-NIC’s Interrupt Status
Register If either the Packet Transmitted bit (PTX) or
Transmit Error bit (TXE) is set to a 1 set the ‘‘Resend’’
variable to a 0 and jump to step 6 If neither of these bits
is set place a 1 in the ‘‘Resend’’ variable and jump to
step 6
This step determines if there was a transmission in prog-
ress when the stop command was issued in step 2 If
there was a transmission in progress the ST-NIC’s ISR
is read to determine whether or not the packet was rec-
ognized by the ST-NIC If neither the PTX nor TXE bit
was set then the packet will essentially be lost and re-
transmitted only after a time-out takes place in the upper
level software By determining that the packet was lost at
the driver level a transmit command can be reissued to
‘‘Resend’’
(Continued)
17
the ST-NIC once the overflow routine is completed (as in
step 11) Also it is possible for the ST-NIC to defer indef-
initely when it is stopped on a busy network Step 5 also
alleviates this problem Step 5 is essential and should
not be omitted from the overflow routine in order for the
ST-NIC to operate correctly
Overflow Routine Flow Chart
TL F 11157 – 57