AD5930YRUZ Analog Devices Inc, AD5930YRUZ Datasheet
AD5930YRUZ
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AD5930YRUZ Summary of contents
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FEATURES Programmable frequency profile No external components necessary Output frequency MHz Burst and listen capability Preprogrammable frequency profile minimizes number of DSP/µcontroller writes Sinusoidal/triangular/square wave outputs Automatic or single pin control of frequency stepping Waveform starts at ...
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AD5930 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 4 Timing Characteristics..................................................................... 6 Absolute Maximum Ratings............................................................ 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 ...
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GENERAL DESCRIPTION (continued from Page 1) To program the device, the user enters the start frequency, the increment step size, the number of increments to be made, and the time interval that the part outputs each frequency. The frequency sweep ...
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AD5930 SPECIFICATIONS 2 5.5 V, AGND = DGND = unless otherwise noted. Table 1. Parameter Min SIGNAL DAC SPECIFICATIONS Resolution Update Rate I Full-Scale 2 OUT V Peak-to-Peak OUT ...
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Parameter Min POWER REQUIREMENTS AV /DV 2 Low Power Sleep Mode 1 Operating temperature range is as follows: Y Version: −40°C to +125°C; typical specifications are at 25°C. 2 ...
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AD5930 TIMING CHARACTERISTICS All input signals are specified with (10 See Figure 4 to Figure 2 5.5 V, AGND = DGND = 0 V, all ...
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MCLK CTRL t 11 IOUT/IOUTB Figure 5. CTRL Timing CTRL t 13 IOUT SYNC O/P (Each Frequency t Increment) 14 SYNC O/P (End of Sweep) Figure 6. CTRL Timing, Saw-Sweep Mode CTRL t 13 IOUT SYNC O/P (Each ...
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AD5930 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter AVDD to AGND DVDD to DGND AGND to DGND CAP/2.5V to DGND Digital I/O Voltage to DGND Analog I/O Voltage to AGND Operating Temperature Range Automotive ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 FSADJUST Full-Scale Adjust Control. A resistor (RSET) must be connected externally between this pin and AGND. This determines the magnitude of the full-scale DAC current. ...
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AD5930 Pin No. Mnemonic Description 18 AGND Ground for all Analog Circuitry. 19 IOUT Current Output. This is a high impedance current source output. A load resistor of nominally 200 Ω should be connected between IOUT and AGND ...
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TYPICAL PERFORMANCE CHARACTERISTICS 25°C A AVDD = 5V 8 MSBOUT, SYNCOUT ENABLED DVDD = DVDD = 5V DVDD = 3V ...
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AD5930 25°C A AVDD = DVDD = FMCLK/4096 65 OUT 10M 20M 30M MCLK FREQUENCY (MHz) Figure 15. SNR vs. MCLK Frequency 1.25 AVDD = DVDD = 5V ...
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Figure 21. Output Phase Noise 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 0 ...
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AD5930 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 0 RWB 1K VWB 300 FREQUENCY (Hz) Figure 27 MHz; MCLK f = 1.2 MHz, Frequency Word = 0624DD3 OUT 0 –10 –20 –30 –40 ...
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TERMINOLOGY Integral Nonlinearity (INL) This is the maximum deviation of any code from a straight line passing through the endpoints of the transfer function. The endpoints of the transfer function are zero scale and full scale. The error is expressed ...
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AD5930 THEORY OF OPERATION The AD5930 is a general-purpose synthesized waveform generator capable of providing digitally programmable waveform sequences in both the frequency and time domain. The device contains embedded digital processing to provide a repetitive sweep of a user ...
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This is beneficial for applications where the user needs to burst a frequency for a set period, and then “listen” for a response before increasing to the next frequency. Note also that the beginning of each frequency increment is at ...
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AD5930 Table 7. Description of Bits in the Control Register Bit Name Function D15 ADDR Register address bits. to D12 D11 B24 Two write operations are required to load a complete word into the F When B24 = 1, a ...
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SETTING UP THE FREQUENCY SWEEP As stated previously in The Frequency Profile section, the AD5930 requires certain registers to be programmed to enable a frequency sweep. The following sections discuss these registers in more detail. Start Frequency (F ) START ...
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AD5930 Therefore, in this example, a time interval × 2047 = 40 µs is the maximum, with the minimum being 40 ns. For some applications, this maximum time of 40 µs may be insufficient. Therefore, to cater ...
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To setup the AD5930 to this mode, CW/BURST (Bit D7) in the control register must be set to 0, INT/EXT BURST (Bit D6) must be set to 0, and INT/EXT INCR (Bit D5) must be set to 1. Note that ...
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AD5930 APPLICATIONS GROUNDING AND LAYOUT The printed circuit board that houses the AD5930 should be designed so that the analog and digital sections are separated and confined to certain areas of the board. This facilitates the use of ground planes ...
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AD5930 TO 68HC11/68L11 INTERFACE Figure 37 shows the serial interface between the AD5930 and the 68HC11/68L11 µcontroller. The µcontroller is configured as the master by setting bit MSTR in the SPCR to 1, which provides a serial clock on SCK ...
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AD5930 EVALUATION BOARD The AD5930 evaluation board allows designers to evaluate the high performance AD5930 DDS modulator with minimum effort. The evaluation board interfaces to the USB port possible to power the entire board off ...
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SCHEMATIC VCC 55 VCC 43 VCC 32 VCC 27 VCC 17 VCC 11 VCC 7 AVCC 3 Figure 40. Page 1 of EVAL-AD5930EB Schematic Rev Page AD5930 GND 56 GND 53 GND 41 GND 28 ...
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AD5930 S4B 8 13 S3B 10 S2B 15 6 S1B 3 1 Figure 41. Page 2 of EVAL-AD5930EB Schematic Rev Page ...
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... OUTLINE DIMENSIONS COPLANARITY ORDERING GUIDE Model Temperature Range AD5930YRUZ 1 −40°C to +105°C 1 AD5930YRUZ-REEL7 −40°C to +105°C EVAL-AD5930EB Pb-free part. 6.60 6.50 6. 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 BSC 1.20 MAX 0.15 0.20 0.05 0.09 0.30 0.19 SEATING ...
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AD5930 NOTES © 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05333-0-11/05(0) Rev Page ...