AD9958BCPZ Analog Devices Inc, AD9958BCPZ Datasheet - Page 42

• Manufacturer Part Number: AD9958BCPZ
• Description: IC DDS DUAL 500MSPS DAC 56LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9958BCPZ

• Design Resources: Low Jitter Sampling Clock Generator for High Performance ADCs Using AD9958/9858 and AD9515 (CN0109) Phase Coherent FSK Modulator (CN0186)
• Resolution (bits): 10 b
• Master Fclk: 500MHz
• Tuning Word Width (bits): 32 b
• Voltage - Supply: 1.71 V ~ 1.96 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 56-LFCSP
• Pll Type: Frequency Synthesis
• Frequency: 500MHz
• Supply Current: 105mA
• Supply Voltage Range: 1.71V To 1.89V
• Digital Ic Case Style: LFCSP
• No. Of Pins: 56
• Operating Temperature Range: -40°C To +85°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9958/PCBZ - BOARD EVALUATION FOR AD9958
• Lead Free Status / Rohs Status: Compliant

AD9958
Channel Frequency Tuning Word 0 (CFTW0)—Address 0x04
Four bytes are assigned to this register.
Table 35. Description for CFTW0
Bit
31:0
Channel Phase Offset Word 0 (CPOW0)—Address 0x05
Two bytes are assigned to this register.
Table 36. Description for CPOW0
Bit
15:14
13:0
Amplitude Control Register (ACR)—Address 0x06
Three bytes are assigned to this register.
Table 37. Description for ACR
Bit
23:16
15:14
13
12
11
10
9:0
Mnemonic
Frequency Tuning Word 0
Mnemonic
Open
Phase Offset Word 0
Mnemonic
Amplitude ramp rate
Increment/decrement
step size
Open
Amplitude multiplier
enable
Ramp-up/ramp-down
enable
Load ARR at
I/O_UPDATE
Amplitude scale factor
Description
Amplitude ramp rate value.
Amplitude increment/decrement step size.
0 = amplitude multiplier is disabled. The clocks to this scaling function (auto RU/RD) are stopped
for power saving, and the data from the DDS core is routed around the multipliers (default).
1 = amplitude multiplier is enabled.
This bit is valid only when ACR[12] is active high.
0 = when ACR[12] is active, Logic 0 on ACR[11] enables the manual RU/RD operation. See the
Output Amplitude Control Mode section for details (default).
1 = if ACR[12] is active, a Logic 1 on ACR[11] enables the auto RU/RD operation. See the Output
Amplitude Control Mode section for details.
0 = the amplitude ramp rate timer is loaded only upon timeout (timer = 1) and is not loaded due
to an I/O_UPDATE input signal (default).
1 = the amplitude ramp rate timer is loaded upon timeout (timer = 1) or at the time of an
I/O_UPDATE input signal.
Amplitude scale factor for each channel.
Description
Frequency Tuning Word 0 for each channel.
Description
Phase Offset Word 0 for each channel.
Rev. A | Page 42 of 44