DSPIC30F3011-30I/PT Microchip Technology Inc., DSPIC30F3011-30I/PT Datasheet - Page 30

• Manufacturer Part Number: DSPIC30F3011-30I/PT
• Description: 16 BIT MCU/DSP 44LD 30MIPS 24 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F3011-30I/PT

• A/d Inputs: 9-Channels, 10-Bit
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: I2C/SPI/UART, USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 44-pin TQFP
• Programmable Memory: 24K Bytes
• Ram Size: 1K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC30F
2.5.1
The 17x17-bit multiplier is capable of signed or
unsigned operation and can multiplex its output using a
scaler to support either 1.31 fractional (Q31) or 32-bit
integer results. The respective number representation
formats are shown in Figure 2-10. Unsigned operands
are zero-extended into the 17th bit of the multiplier
input value. Signed operands are sign-extended into
the 17th bit of the multiplier input value. The output of
the 17x17-bit multiplier/scaler is a 33-bit value, which
is sign-extended to 40 bits. Integer data is inherently
represented as a signed two’s complement value,
where the MSB is defined as a sign bit. Generally
speaking, the range of an N-bit two’s complement inte-
ger is -2
range is -32768 (0x8000) to 32767 (0x7FFF), includ-
ing ‘0’ (see Figure 2-10). For a 32-bit integer, the data
range
2,147,483,645 (0x7FFF FFFF).
FIGURE 2-10:
In the special case when both input operands are 1.15
fractions and equal to 0x8000 (-1
multiplication is corrected to 0x7FFFFFFF (as the clos-
est approximation to +1) by hardware, before it is used.
It should be noted that with the exception of DSP mul-
tiplies, the dsPIC30F ALU operates identically on inte-
ger and fractional data. Namely, an addition of two
integers will yield the same result (binary number) as
the addition of two fractional numbers. The only differ-
ence is how the result is interpreted by the user. How-
ever, multiplies performed by DSP operations are
different. In these instructions, data format selection is
made with the IF bit (CORCON<0>) and US bits
(CORCON<12>), and it must be set accordingly (‘0’
for Fractional mode, ‘1’ for Integer mode in the case
of the IF bit, and ‘0’ for signed mode, ‘1’ for unsigned
mode in the case of the US bit). This is required
because of the implied radix point used by dsPIC30F
fractions. In Integer mode, multiplying two 16-bit inte-
gers produces a 32-bit integer result. However, multi-
plying two 1.15 values generates a 2.30 result. Since
the dsPIC30F uses 1.31 format for the accumulators,
DS70082G-page 28
N-1
is
MULTIPLIER
to 2
-2,147,483,648
Different Representations of 0x4001
Integer:
N-1
1.15 Fractional:
-2
2
– 1. For a 16-bit integer, the data
0
0
0
0
0x4001 = 2
0x4001 = 2
16-BIT INTEGER AND FRACTIONAL MODES
2
2
1
1
14
-1
2
2
0
0
-2
13
-1
(0x8000 0000)
14
2
10
0
+ 2
2
+ 2
0
-3
12
), the result of the
...
-15
0
= 16385
0
= 0.500030518
0
2
11
....
0
0
0
0
Preliminary
to
0
0
0
0
0
When the multiplier is configured for fractional multipli-
cation, the data is represented as a two’s complement
fraction, where the MSB is defined as a sign bit and the
radix point is implied to lie just after the sign bit (QX for-
mat). The range of an N-bit two’s complement fraction
with this implied radix point is -1.0 to (1-2
16-bit fraction, the Q15 data range is -1.0 (0x8000) to
0.999969482 (0x7FFF), including ‘0’ and has a preci-
sion of 3.01518x10
tiply operation generates a 1.31 product, which has a
precision of 4.65661x10
Certain multiply operations always operate on signed
data. These include the MAC/MSC, MPY[.N] and
ED[AC] instructions. The 40-bit adder/subtractor may
also optionally negate one of its operand inputs to
change the result sign (without changing the oper-
ands). This is used to create a multiply and subtract
(MSC) or multiply and negate (MPY.N) operation.
a DSP multiply in Fractional mode also includes a left
shift by one bit to keep the radix point properly
aligned. This feature reduces the resolution of the
DSP multiplier to 2
computation.
The same multiplier is used to support the MCU multi-
ply instructions, which include integer 16-bit signed,
unsigned and mixed sign multiplies. Additional data
paths are provided to allow these instructions to write
the result back into the W array and X data bus (via the
W array). These paths are placed prior to the data
scaler. The IF bit in the CORCON register, therefore,
only affects the result of the MAC class of DSP instruc-
tions. All other multiply operations are assumed to be
integer operations. If the user executes a MAC instruc-
tion on fractional data without clearing the IF bit, the
result must be explicitly shifted left by the user program
after multiplication in order to obtain the correct result.
0
0
0
0
0
0
0
-5
-30
0
. In fractional mode, a 16x16 mul-
0
, but has no other effect on the
 2004 Microchip Technology Inc.
-10
0
.
0
2
2
1
-15
1
0
1-N
). For a