DSPIC30F3011-30I/PT Microchip Technology Inc., DSPIC30F3011-30I/PT Datasheet - Page 59

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DSPIC30F3011-30I/PT

Manufacturer Part Number
DSPIC30F3011-30I/PT
Description
16 BIT MCU/DSP 44LD 30MIPS 24 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC30F3011-30I/PT

A/d Inputs
9-Channels, 10-Bit
Cpu Speed
30 MIPS
Eeprom Memory
1K Bytes
Input Output
30
Interface
I2C/SPI/UART, USART
Ios
30
Memory Type
Flash
Number Of Bits
16
Package Type
44-pin TQFP
Programmable Memory
24K Bytes
Ram Size
1K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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DSPIC30F3011-30I/PT
0
6.0
The dsPIC30F family of devices contains internal
program Flash memory for executing user code. There
are two methods by which the user can program this
memory:
1.
2.
6.1
dsPIC30F devices can be serially programmed while in
the end application circuit. This is simply done with two
lines for Programming Clock and Programming Data
(which are named PGC and PGD respectively), and
three other lines for Power (V
Master Clear (MCLR). this allows customers to manu-
facture boards with unprogrammed devices, and then
program the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
FIGURE 6-1:
 2004 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the dsPIC30F Family Reference
Manual (DS70046). For more information on the device
instruction set and programming, refer to the dsPIC30F
Programmer’s Reference Manual (DS70030).
In-Circuit Serial Programming
Run Time Self-Programming (RTSP)
User/Configuration
Space Select
FLASH PROGRAM MEMORY
In-Circuit Serial Programming
(ICSP)
ADDRESSING FOR TABLE AND NVM REGISTERS
Using
NVMADR
Addressing
Using
Table
Instruction
Using
Program
Counter
DD
), Ground (V
TM
(ICSP
1/0
1/0
0
TM
TBLPAG Reg
NVMADRU Reg
)
SS
8 bits
8 bits
) and
Preliminary
Program Counter
24 bits
24-bit EA
6.2
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions.
With RTSP, the user may erase and program 32
instructions (96 bytes) at a time.
6.3
The TBLRDL and the TBLWTL instructions are used to
read or write to bits <15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
Word or Byte mode.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can access program memory in Word or
Byte mode.
A 24-bit program memory address is formed using
bits<7:0> of the TBLPAG register and the effective
address (EA) from a W register specified in the table
instruction, as shown in Figure 6-1.
NVMADR Reg EA
Working Reg EA
16 bits
16 bits
Run Time Self-Programming
(RTSP)
Table Instruction Operation Summary
0
Byte
Select
dsPIC30F
DS70082G-page 57

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