DSPIC30F6010A-30I/PF Microchip Technology Inc., DSPIC30F6010A-30I/PF Datasheet - Page 227
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DSPIC30F6010A-30I/PF
Manufacturer Part Number
DSPIC30F6010A-30I/PF
Description
16 BIT MCU/DSP 80LD 30MIPS 144 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F6010A-30IPF.pdf
(236 pages)
Specifications of DSPIC30F6010A-30I/PF
A/d Inputs
16-Channels, 10-Bit
Cpu Speed
30 MIPS
Eeprom Memory
4K Bytes
Input Output
68
Interface
CAN, I2C, SPI, UART/USART
Ios
68
Memory Type
Flash
Number Of Bits
16
Package Type
80-pin TQFP
Programmable Memory
144K Bytes
Ram Size
8K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6010A-30I/PF
Manufacturer:
AD
Quantity:
2 100
Company:
Part Number:
DSPIC30F6010A-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
INDEX
A
A/D
AC Characteristics ........................................................... 184
Address Generator Units ................................................... 33
Alternate Vector Table ....................................................... 43
Alternate 16-bit Timer/Counter ........................................... 89
Assembler
Automatic Clock Stretch ................................................... 110
B
Barrel Shifter ...................................................................... 20
Bit-Reversed Addressing ................................................... 36
Block Diagrams
© 2006 Microchip Technology Inc.
Aborting a Conversion ............................................. 138
Acquisition Requirements ........................................ 142
ADCHS .................................................................... 135
ADCON1 .................................................................. 135
ADCON2 .................................................................. 135
ADCON3 .................................................................. 135
ADCSSL ................................................................... 135
ADPCFG .................................................................. 135
Configuring Analog Port Pins ................................... 144
Connection Considerations ...................................... 144
Conversion Operation .............................................. 137
Conversion Rate Parameters ................................... 139
Conversion Speeds .................................................. 139
Effects of a Reset ..................................................... 143
Operation During CPU Idle Mode ............................ 143
Operation During CPU Sleep Mode ......................... 143
Output Formats ........................................................ 143
Power-Down Modes ................................................. 143
Programming the Start of Conversion Trigger ......... 138
Register Map ............................................................ 145
Result Buffer ............................................................ 137
Selecting the Conversion Clock ............................... 138
Selecting the Conversion Sequence ........................ 137
Voltage Reference Schematic ................................. 140
1 Msps Configuration Guideline ............................... 140
10-bit High-Speed Analog-to-Digital
600 ksps Configuration Guideline ............................ 141
750 ksps Configuration Guideline ............................ 141
Internal FRC Jitter, Accuracy and Drift .................... 188
Internal LPRC Accuracy ........................................... 188
Load Conditions ....................................................... 184
Temperature and Voltage Specifications ................. 184
MPASM Assembler .................................................. 172
During 10-bit Addressing (STREN = 1) .................... 110
During 7-bit Addressing (STREN = 1) ...................... 110
Receive Mode .......................................................... 110
Transmit Mode ......................................................... 110
Example ..................................................................... 36
Implementation .......................................................... 36
Modifier Values (table) ............................................... 37
Sequence Table (16-Entry) ........................................ 37
CAN Buffers and Protocol Engine ............................ 124
Dedicated Port Structure ............................................ 57
DSP Engine ............................................................... 17
dsPIC30F6010A ........................................................... 8
dsPIC30F6015 ............................................................. 9
External Power-on Reset Circuit .............................. 156
Input Capture Mode ................................................... 79
I
2
C ............................................................................ 108
Converter Module ............................................ 135
dsPIC30F6010A/6015
BOR. See Brown-out Reset.
Brown-out Reset (BOR) ................................................... 147
C
C Compilers
CAN
CAN Module .................................................................... 123
Center-Aligned PWM ......................................................... 97
Oscillator System ..................................................... 149
Output Compare Mode .............................................. 83
PWM Module ............................................................. 94
Quadrature Encoder Interface ................................... 87
Reset System .......................................................... 153
Shared Port Structure ................................................ 58
SPI ........................................................................... 104
SPI Master/Slave Connection .................................. 104
UART Receiver ........................................................ 116
UART Transmitter .................................................... 115
10-bit High-Speed A/D Functional ........................... 136
16-bit Timer1 Module (Type A Timer) ........................ 64
16-bit Timer2 (Type B Timer) for dsPIC30F6010A .... 70
16-bit Timer2 (Type B Timer) for dsPIC30F6015 ...... 70
16-bit Timer3 (Type C Timer) .................................... 71
16-bit Timer4 (Type B Timer) .................................... 76
16-bit Timer5 (Type C Timer) .................................... 76
32-bit Timer2/3 for dsPIC30F6010A .......................... 68
32-bit Timer2/3 for dsPIC30F6015 ............................ 69
32-bit Timer4/5 .......................................................... 75
MPLAB C18 ............................................................. 172
MPLAB C30 ............................................................. 172
Baud Rate Setting ................................................... 128
CAN1 Register Map for dsPIC30F6010A/6015 ....... 130
CAN2 Register Map for dsPIC30F6010A ................ 132
Frame Types ........................................................... 123
Message Reception ................................................. 126
Message Transmission ............................................ 127
Operation Modes ..................................................... 125
Overview .................................................................. 123
Bit Timing ......................................................... 128
Phase Segments ............................................. 129
Prescaler ......................................................... 129
Propagation Segment ...................................... 129
Sample Point ................................................... 129
Synchronization ............................................... 129
Acceptance Filter Masks ................................. 126
Acceptance Filters ........................................... 126
Receive Buffers ............................................... 126
Receive Errors ................................................. 126
Receive Interrupts ........................................... 126
Receive Overrun .............................................. 126
Aborting ........................................................... 127
Errors ............................................................... 127
Priority ............................................................. 127
Sequence ........................................................ 127
Transmit Buffers .............................................. 127
Transmit Interrupts .......................................... 128
Disable ............................................................ 125
Error Recognition ............................................. 125
Initialization ...................................................... 125
Listen-Only ...................................................... 125
Loopback ......................................................... 125
Normal ............................................................. 125
DS70150B-page 225