DSPIC30F6010A-30I/PF Microchip Technology Inc., DSPIC30F6010A-30I/PF Datasheet - Page 230
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DSPIC30F6010A-30I/PF
Manufacturer Part Number
DSPIC30F6010A-30I/PF
Description
16 BIT MCU/DSP 80LD 30MIPS 144 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F6010A-30IPF.pdf
(236 pages)
Specifications of DSPIC30F6010A-30I/PF
A/d Inputs
16-Channels, 10-Bit
Cpu Speed
30 MIPS
Eeprom Memory
4K Bytes
Input Output
68
Interface
CAN, I2C, SPI, UART/USART
Ios
68
Memory Type
Flash
Number Of Bits
16
Package Type
80-pin TQFP
Programmable Memory
144K Bytes
Ram Size
8K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6010A-30I/PF
Manufacturer:
AD
Quantity:
2 100
Company:
Part Number:
DSPIC30F6010A-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
dsPIC30F6010A/6015
PWM Fault Pins ............................................................... 100
PWM Operation During CPU Idle Mode ........................... 101
PWM Operation During CPU Sleep Mode ....................... 101
PWM Output and Polarity Control .................................... 100
PWM Output Override ........................................................ 99
PWM Period ....................................................................... 96
PWM Special Event Trigger ............................................. 101
PWM Time Base ................................................................ 95
PWM Update Lockout ...................................................... 101
Q
Quadrature Encoder Interface (QEI) Module ..................... 87
R
Reader Response ............................................................ 232
Reset ........................................................................ 147, 153
Reset Sequence ................................................................. 41
Resets
Revision History ............................................................... 219
RTSP Control Registers ..................................................... 48
S
Simple Capture Event Mode
Simple Output Compare Match Mode ................................ 84
Simple PWM Mode ............................................................ 84
Single-Pulse PWM Operation ............................................ 99
Software Controlled Clock Stretching (STREN = 1) ......... 110
Software Simulator (MPLAB SIM) .................................... 172
DS70150B-page 228
Enable Bits ............................................................... 100
Fault States .............................................................. 100
Input Modes ............................................................. 100
Priority ...................................................................... 100
Output Pin Control ................................................... 100
Complementary Output Mode .................................... 99
Synchronization ......................................................... 99
Postscaler ................................................................ 101
Continuous Up/Down Counting Modes ...................... 95
Double Update Mode ................................................. 96
Free-Running Mode ................................................... 95
Postscaler .................................................................. 96
Prescaler .................................................................... 96
Single-Shot Mode ...................................................... 95
Interrupts .................................................................... 90
Logic .......................................................................... 88
Operation During CPU Idle Mode .............................. 89
Operation During CPU Sleep Mode ........................... 89
Register Map .............................................................. 91
Timer Operation During CPU Idle Mode .................... 90
Timer Operation During CPU Sleep Mode ................. 89
Reset Sources ........................................................... 41
Brown-out Rest (BOR), Programmable ................... 155
POR with Long Crystal Start-up Time ...................... 155
POR, Operating without FSCM and PWRT ............. 155
Power-on Reset (POR) ............................................ 154
NVMADR ................................................................... 48
NVMADRU ................................................................. 48
NVMCON ................................................................... 48
NVMKEY .................................................................... 48
Capture Buffer Operation ........................................... 80
Capture Prescaler ...................................................... 79
Hall Sensor Mode ...................................................... 80
Timer2 and Timer3 Selection Mode ........................... 80
Input Pin Fault Protection ........................................... 84
Period ......................................................................... 85
Cycle-by-Cycle ................................................. 100
Latched ............................................................ 100
Software Stack Pointer, Frame Pointer ............................. 14
SPI Module ...................................................................... 103
STATUS Register .............................................................. 14
Symbols Used in Opcode Descriptions ........................... 164
System Integration ........................................................... 147
T
Timer1 Module ................................................................... 63
Timer2 and Timer3 Selection Mode ................................... 84
Timer2/3 Module ................................................................ 67
Timer4/5 Module ................................................................ 75
Timing Diagrams
CALL Stack Frame .................................................... 29
Framed SPI Support ................................................ 105
Operating Function Description ............................... 103
Operation During CPU Idle Mode ............................ 105
Operation During CPU Sleep Mode ......................... 105
SDOx Disable .......................................................... 103
Slave Select Synchronization .................................. 105
SPI1 Register Map ................................................... 106
SPI2 Register Map ................................................... 106
Word and Byte Communication ............................... 103
Register Map for dsPIC30F6010A ........................... 161
Register Map for dsPIC30F6015 ............................. 161
Gate Operation .......................................................... 64
Interrupt ..................................................................... 65
Operation During Sleep Mode ................................... 64
Prescaler ................................................................... 64
Real-Time Clock ........................................................ 65
Register Map ............................................................. 66
16-bit Asynchronous Counter Mode .......................... 63
16-bit Synchronous Counter Mode ............................ 63
16-bit Timer Mode ...................................................... 63
ADC Event Trigger ..................................................... 72
Gate Operation .......................................................... 72
Interrupt ..................................................................... 72
Operation During Sleep Mode ................................... 72
Register Map ............................................................. 73
Timer Prescaler ......................................................... 72
32-bit Synchronous Counter Mode ............................ 67
32-bit Timer Mode ...................................................... 67
Register Map ............................................................. 77
Band Gap Start-up Time .......................................... 191
CAN Bit .................................................................... 128
CAN I/O ................................................................... 209
Center-Aligned PWM ................................................. 97
Dead-Time ................................................................. 99
Edge-Aligned PWM ................................................... 96
External Clock .......................................................... 184
Input Capture (CAPx) .............................................. 195
I
I
I
I
Motor Control PWM ................................................. 197
Motor Control PWM Fault ........................................ 197
OC/PWM .................................................................. 196
Output Compare (OCx) ............................................ 195
PWM Output .............................................................. 85
QEA/QEB Input ....................................................... 198
QEI Module Index Pulse .......................................... 199
Reset, Watchdog Timer, Oscillator Start-up
SPI Master Mode (CKE = 0) .................................... 200
2
2
2
2
C Bus Data (Master Mode) ................................... 205
C Bus Data (Slave Mode) ..................................... 207
C Bus Start/Stop Bits (Master Mode) .................... 205
C Bus Start/Stop Bits (Slave Mode) ...................... 207
Interrupts ........................................................... 65
Oscillator Operation ........................................... 65
Timer and Power-up Timer .............................. 190
© 2006 Microchip Technology Inc.