PIC18F4550-I/PT Microchip Technology Inc., PIC18F4550-I/PT Datasheet - Page 334

no-image

PIC18F4550-I/PT

Manufacturer Part Number
PIC18F4550-I/PT
Description
44 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4550-I/PT

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
34
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4550-I/PT
Manufacturer:
MURATA
Quantity:
12 000
Part Number:
PIC18F4550-I/PT
Manufacturer:
Microchip Technology
Quantity:
36 332
Part Number:
PIC18F4550-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F4550-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F4550-I/PT
0
Company:
Part Number:
PIC18F4550-I/PT
Quantity:
4 500
PIC18F2455/2550/4455/4550
MOVFF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (source)
2nd word (destin.)
Description:
Words:
Cycles:
Example:
DS39632C-page 332
Q Cycle Activity:
Before Instruction
After Instruction
Decode
Decode
REG1
REG2
REG1
REG2
Q1
No dummy
register ‘f’
operation
Move f to f
MOVFF f
0
0
(f
None
The contents of source register ‘f
moved to destination register ‘f
Location of source ‘f
in the 4096-byte data space (000h to
FFFh) and location of destination ‘f
can also be anywhere from 000h to
FFFh.
Either source or destination can be W
(a useful special situation).
MOVFF is particularly useful for
transferring a data memory location to a
peripheral register (such as the transmit
buffer or an I/O port).
The MOVFF instruction cannot use the
PCL, TOSU, TOSH or TOSL as the
destination register.
2
2
MOVFF
s
Read
(src)
read
)
1100
1111
No
Q2
f
f
=
=
=
=
s
d
f
d
4095
4095
33h
11h
33h
33h
s
REG1, REG2
,f
ffff
ffff
d
operation
Process
Data
No
Q3
s
’ can be anywhere
ffff
ffff
register ‘f’
operation
(dest)
Write
d
No
Q4
ffff
ffff
’.
s
’ are
d
Preliminary
s
d
MOVLB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
BSR Register =
BSR Register =
Q1
Move Literal to Low Nibble in BSR
MOVLW k
0
k
None
The eight-bit literal ‘k’ is loaded into the
Bank Select Register (BSR). The value
of BSR<7:4> always remains ‘0’
regardless of the value of k
1
1
literal ‘k’
MOVLB
Read
0000
Q2
k
BSR
© 2006 Microchip Technology Inc.
255
02h
05h
0001
Process
5
Data
Q3
kkkk
Write literal
7
‘k’ to BSR
:k
4
.
Q4
kkkk

Related parts for PIC18F4550-I/PT