PIC18F4550-I/PT Microchip Technology Inc., PIC18F4550-I/PT Datasheet - Page 399

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PIC18F4550-I/PT

Manufacturer Part Number
PIC18F4550-I/PT
Description
44 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F4550-I/PT

A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
34
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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TABLE 28-28: A/D CONVERTER CHARACTERISTICS: PIC18F2455/2550/4455/4550 (INDUSTRIAL)
FIGURE 28-23:
© 2006 Microchip Technology Inc.
Param
A01
A03
A04
A06
A07
A10
A20
A21
A22
A25
A30
A50
Note 1:
No.
A/D DATA
Note 1:
2:
SAMPLE
A/D CLK
ADRES
Symbol
N
E
E
E
E
V
V
V
Z
I
BSF ADCON0, GO
REF
V
REFH
REFL
AIN
AIN
IL
DL
OFF
GN
ADIF
R
REF
The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
V
V
GO
Q4
2:
REFH
REFL
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
Resolution
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Monotonicity
Reference Voltage Range
(V
Reference Voltage High
Reference Voltage Low
Analog Input Voltage
Recommended Impedance of
Analog Voltage Source
V
132
current is from RA2/AN2/V
current is from RA3/AN3/V
REF
REFH
A/D CONVERSION TIMING
Input Current
– V
Characteristic
REFL
(Note 2)
)
9
(2)
8
REF
REF
PIC18F2455/2550/4455/4550
OLD_DATA
-/CV
+ pin or V
7
Preliminary
SAMPLING STOPPED
V
REF
SS
. . .
V
Min
V
1.8
REFL
– 0.3V
CY
3
SS
pin or V
DD
is added before the A/D clock starts.
, whichever is selected as the V
. . .
Guaranteed
131
130
SS
PIC18LF2455/2550/4455/4550 (INDUSTRIAL)
Typ
, whichever is selected as the V
2
(1)
V
DD
1
V
V
<±1.5
Max
<±1
<±1
<±1
150
REFH
REFH
2.5
10
– 3.0V
5
0
Units
LSb
LSb
LSb
LSb
k
bit
V
V
V
V
V
A
A
REFH
V
V
V
During V
During A/D conversion
cycle.
NEW_DATA
DONE
V
V
V
V
V
SS
DD
DD
REF
REF
REF
REF
REF
source.
REFL
DS39632C-page 397
< 3.0V
Conditions
T
V
3.0V
CY (1)
AIN
AIN
3.0V
3.0V
3.0V
3.0V
3.0V
source.
acquisition.
V
REF

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