PIC18F6520-I/PT Microchip Technology Inc., PIC18F6520-I/PT Datasheet - Page 95

• Manufacturer Part Number: PIC18F6520-I/PT
• Description: 64 PIN, 32 KB FLASH, 2048 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6520-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 52
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 32K Bytes
• Ram Size: 2K Bytes
• Speed: 40 MHz
• Timers: 2-8 bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 9-5:
 2004 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PIC18F6520/8520/6620/8620/6720/8720
PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
bit 7
Unimplemented: Read as ‘0’
CMIF: Comparator Interrupt Flag bit
1 = The comparator input has changed (must be cleared in software)
0 = The comparator input has not changed
Unimplemented: Read as ‘0’
EEIF: Data EEPROM/Flash Write Operation Interrupt Flag bit
1 = The write operation is complete (must be cleared in software)
0 = The write operation is not complete, or has not been started
BCLIF: Bus Collision Interrupt Flag bit
1 = A bus collision occurred while the SSP module (configured in I
0 = No bus collision occurred
LVDIF: Low-Voltage Detect Interrupt Flag bit
1 = A low-voltage condition occurred (must be cleared in software)
0 = The device voltage is above the Low-Voltage Detect trip point
TMR3IF: TMR3 Overflow Interrupt Flag bit
1 = TMR3 register overflowed (must be cleared in software)
0 = TMR3 register did not overflow
CCP2IF: CCP2 Interrupt Flag bit
Capture mode:
1 = A TMR1 or TMR3 register capture occurred (must be cleared in software)
0 = No TMR1 or TMR3 register capture occurred
Compare mode:
1 = A TMR1 or TMR3 register compare match occurred (must be cleared in software)
0 = No TMR1 or TMR3 register compare match occurred
PWM mode:
Unused in this mode.
Legend:
R = Readable bit
- n = Value at POR
U-0
—
was transmitting (must be cleared in software)
R/W-0
CMIF
U-0
W = Writable bit
‘1’ = Bit is set
—
R/W-0
EEIF
BCLIF
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
LVDIF
2
C Master mode)
TMR3IF
x = Bit is unknown
R/W-0
DS39609B-page 93
CCP2IF
R/W-0
bit 0