PIC18F1320-I/SO Microchip Technology Inc., PIC18F1320-I/SO Datasheet - Page 136

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PIC18F1320-I/SO

Manufacturer Part Number
PIC18F1320-I/SO
Description
Microcontroller; 8 KB Flash; 256 RAM; 256 EEPROM; 16 I/O; 18-Pin-PDIP
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F1320-I/SO

A/d Inputs
7-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
8K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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Manufacturer
Quantity
Price
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP
Quantity:
35 000
Part Number:
PIC18F1320-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
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PIC18F1220/1320
REGISTER 16-3:
DS39605C-page 134
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
BAUDCTL: BAUD RATE CONTROL REGISTER
bit 7
Unimplemented: Read as ‘0’
RCIDL: Receive Operation Idle Status bit
1 = Receiver is Idle
0 = Receiver is busy
Unimplemented: Read as ‘0’
SCKP: Synchronous Clock Polarity Select bit
Asynchronous mode:
Unused in this mode.
Synchronous mode:
1 = Idle state for clock (CK) is a high level
0 = Idle state for clock (CK) is a low level
BRG16: 16-bit Baud Rate Register Enable bit
1 = 16-bit Baud Rate Generator – SPBRGH and SPBRG
0 = 8-bit Baud Rate Generator – SPBRG only (Compatible mode), SPBRGH value ignored
Unimplemented: Read as ‘0’
WUE: Wake-up Enable bit
Asynchronous mode:
1 = EUSART will continue to sample the RX pin – interrupt generated on falling edge; bit
0 = RX pin not monitored or rising edge detected
Synchronous mode:
Unused in this mode.
ABDEN: Auto-Baud Detect Enable bit
Asynchronous mode:
1 = Enable baud rate measurement on the next character – requires reception of a Sync byte
0 = Baud rate measurement disabled or completed
Synchronous mode:
Unused in this mode.
Legend:
R = Readable bit
-n = Value at POR
U-0
cleared in hardware on following rising edge
(55h); cleared in hardware upon completion
RCIDL
R-1
U-0
W = Writable bit
‘1’ = Bit is set
R/W-0
SCKP
BRG16
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
 2004 Microchip Technology Inc.
x = Bit is unknown
R/W-0
WUE
ABDEN
R/W-0
bit 0

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