PIC16F737-I/SP Microchip Technology Inc., PIC16F737-I/SP Datasheet - Page 201

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PIC16F737-I/SP

Manufacturer Part Number
PIC16F737-I/SP
Description
28 PIN, 7 KB FLASH, 368 RAM, 25 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F737-I/SP

A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
25
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
7K Bytes
Ram Size
192 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
RLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2004 Microchip Technology Inc.
Rotate Left f through Carry
[ label ] RLF
0
d
See description below
C
The contents of register ‘f’ are
rotated one bit to the left through the
Carry flag. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
Return from Subroutine
[ label ]
None
TOS
None
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
Rotate Right f through Carry
[ label ]
0
d
See description below
C
The contents of register ‘f’ are
rotated one bit to the right through
the Carry flag. If ‘d’ is ‘0’, the
result is placed in the W register.
If ‘d’ is ‘1’, the result is placed
back in register ‘f’.
f
f
[0,1]
[0,1]
127
127
C
PC
C
RRF f,d
RETURN
f,d
Register f
Register f
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
Subtract W from f
[ label ] SUBWF f,d
0
d
(f) – (W)
Subtract (2’s complement method)
W register from register ‘f’. If ‘d’ is
‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
Subtract W from Literal
[ label ] SUBLW k
0
k – (W)
The W register is subtracted (2’s
complement method) from the
eight-bit literal ‘k’. The result is
placed in the W register.
Enter Sleep mode
[ label ] SLEEP
None
00h
0
1
0
TO, PD
The Power-Down status bit, PD,
is cleared. Time-out status bit,
TO, is set. Watchdog Timer and
its prescaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
f
k
[0,1]
127
WDT prescaler,
TO,
PD
255
PIC16F7X7
WDT,
W)
destination)
DS30498C-page 199

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