PIC16F1933-I/SO Microchip Technology Inc., PIC16F1933-I/SO Datasheet - Page 147

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PIC16F1933-I/SO

Manufacturer Part Number
PIC16F1933-I/SO
Description
28 SOIC .300in TUBE, 7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1933-I/SO

A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part

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REGISTER 12-20: LATE: PORTE DATA LATCH REGISTER
REGISTER 12-21: ANSELE: PORTE ANALOG SELECT REGISTER
 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7-4
bit 3-0
Note 1:
bit 7
Legend:
R = Readable bit
u = bit is unchanged
‘1’ = Bit is set
bit 7-3
bit 2-0
Note 1:
U-0
U-0
2:
Writes to PORTE are actually written to corresponding LATE register. Reads from PORTE register is
return of actual I/O pin values.
When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to
allow external control of the voltage on the pin.
ANSELE register is not implemented on the PIC16F1933/1936/1938/PIC16LF1933/1936/1938. Read as ‘0’
Unimplemented: Read as ‘0’
ANSE<2:0>: Analog Select between Analog or Digital Function on Pins RE<2:0>, respectively
0 = Digital I/O. Pin is assigned to port or digital special function.
1 = Analog input. Pin is assigned as analog input
Unimplemented: Read as ‘0’
LATE<3:0>: PORTE Output Latch Value bits
U-0
U-0
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
U-0
U-0
U-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
(1)
R/W-x/u
LATE3
U-0
PIC16F193X/LF193X
(1)
. Digital input buffer disabled.
ANSE2
R/W-x/u
LATE2
R/W-1
(2)
ANSE1
R/W-x/u
LATE1
R/W-1
(2)
DS41364D-page 147
ANSE0
R/W-x/u
R/W-1
LATE0
bit 0
bit 0
(2)

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