PIC16F1933-I/SO Microchip Technology Inc., PIC16F1933-I/SO Datasheet - Page 281
PIC16F1933-I/SO
Manufacturer Part Number
PIC16F1933-I/SO
Description
28 SOIC .300in TUBE, 7KB Flash, 256B RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1933-ISS.pdf
(508 pages)
Specifications of PIC16F1933-I/SO
A/d Inputs
11-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
25
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
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23.6.13.3
Bus collision occurs during a Stop condition if:
a)
b)
FIGURE 23-38:
FIGURE 23-39:
2009 Microchip Technology Inc.
After the SDA pin has been deasserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is deasserted, SCL is sampled
low before SDA goes high.
SDA
SCL
PEN
BCLIF
P
SSPIF
SDA
SCL
PEN
BCLIF
P
SSPIF
Bus Collision During a Stop
Condition
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDA asserted low
Assert SDA
T
BRG
T
BRG
Preliminary
T
BRG
T
BRG
The Stop condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the Baud Rate Generator is loaded with SSPADD and
counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ‘0’ (Figure 23-37). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master
attempting to drive a data ‘0’ (Figure 23-38).
PIC16F193X/LF193X
SCL goes low before SDA goes high,
set BCLIF
T
BRG
T
BRG
SDA sampled
low after T
set BCLIF
’0’
’0’
DS41364D-page 281
’0’
’0’
BRG
,
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