PIC16F88-I/SO Microchip Technology Inc., PIC16F88-I/SO Datasheet - Page 51
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PIC16F88-I/SO
Manufacturer Part Number
PIC16F88-I/SO
Description
18 PIN, 7 KB FLASH, 368 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F88-ISO.pdf
(228 pages)
Specifications of PIC16F88-I/SO
A/d Inputs
7-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin SOIC
Programmable Memory
7K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F88-I/SO
Manufacturer:
ROHM
Quantity:
15 000
Part Number:
PIC16F88-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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TABLE 4-4:
2005 Microchip Technology Inc.
Note 1: If the new clock source is the INTOSC or INTOSC postscaler, then the IOFS bit will be set 4 ms (approx.)
LP, XT, HS,
LP, XT, HS,
LP, XT, HS
Current
T1OSC,
System
EC, RC
INTRC,
EC, RC
T1OSC
T1OSC
INTRC
INTRC
Clock
after the clock change.
FOSC<2:0> = LP,
FOSC<2:0> = LP,
FOSC<2:0> = EC
FOSC<2:0> = RC
FOSC<2:0> = LP,
SCS Bits <1:0>
(Due to Reset)
Modified to:
LP, XT, HS
CLOCK SWITCHING MODES
XT or HS
XT or HS
(T1OSC)
(INTRC)
XT, HS
10
01
00
00
00
or
1024 Clocks
1024 Clocks
8 Clocks of
8 Clocks of
8 Clocks of
8 Clocks of
LP, XT, HS
T1OSC
INTRC
Delay
(OST)
(OST)
RC
EC
or
+
OSTS
Bit
0
0
1
1
1
IOFS
N/A
N/A
N/A
N/A
1
Bit
(1)
T1RUN
Bit
0
1
0
0
0
LP, XT, HS During the 1024 clocks,
LP, XT, HS When a Reset occurs, there is
Postscaler
INTOSC
INTOSC
System
T1OSC
INTRC
Clock
New
RC
EC
or
or
or
PIC16F87/88
The internal RC oscillator
frequency is dependant upon
the IRCF bits.
T1OSCEN bit must be
enabled.
program execution is clocked
from the secondary oscillator
until the primary oscillator
becomes stable.
no clock transition sequence.
Instruction execution and/or
peripheral operation is
suspended unless Two-Speed
Start-up mode is enabled, after
which the INTRC will act as the
system clock until the OST
timer has expired.
Comments
DS30487C-page 49
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