PIC16F88-I/SO Microchip Technology Inc., PIC16F88-I/SO Datasheet - Page 83

• Manufacturer Part Number: PIC16F88-I/SO
• Description: 18 PIN, 7 KB FLASH, 368 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F88-I/SO

• A/d Inputs: 7-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 16
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 7K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

9.0
The Capture/Compare/PWM (CCP) module contains a
16-bit register that can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register.
Table 9-1 shows the timer resources of the CCP
module modes.
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match which will reset Timer1
and start an A/D conversion (if the A/D module is
enabled).
REGISTER 9-1:
 2005 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULE
bit 7-6
bit 5-4
bit 3-0
bit 7
Unimplemented: Read as ‘0’
CCP1X:CCP1Y: PWM Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPR1L.
CCP1M<3:0>: CCP1 Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCP1 module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is
1011 = Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected); CCP1
11xx = PWM mode
Legend:
R = Readable bit
-n = Value at POR
CCP1CON: CAPTURE/COMPARE/PWM CONTROL REGISTER 1 (ADDRESS 17h)
U-0
—
unaffected)
resets TMR1 and starts an A/D conversion (if A/D module is enabled)
U-0
—
CCP1X
R/W-0
W = Writable bit
‘1’ = Bit is set
CCP1Y
R/W-0
The CCP module’s input/output pin (CCP1) can be
configured as RB0 or RB3. This selection is set in bit 12
(CCPMX) of the Configuration Word.
Additional information on the CCP module is available
in the “PICmicro
Manual” (DS33023) and in Application Note AN594,
“Using the CCP Module(s)” (DS00594).
TABLE 9-1:
CCP Mode
Compare
CCP1M3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Capture
R/W-0
PWM
®
CCP MODE – TIMER
RESOURCE
Mid-Range MCU Family Reference
CCP1M2
PIC16F87/88
R/W-0
x = Bit is unknown
Timer Resource
CCP1M1
R/W-0
DS30487C-page 81
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0