ICS1893Y-10LF IDT, Integrated Device Technology Inc, ICS1893Y-10LF Datasheet - Page 133

PHYCEIVER LOW PWR 3.3V 64-TQFP

ICS1893Y-10LF

Manufacturer Part Number
ICS1893Y-10LF
Description
PHYCEIVER LOW PWR 3.3V 64-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Series
PHYceiver™r
Type
PHY Transceiverr
Datasheets

Specifications of ICS1893Y-10LF

Protocol
MII
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Other names
1893Y-10LF
800-1935-5
ICS1893Y-10LF

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10.5.7 MII Management Interface Timing
ICS1893 Rev C 6/6/00
Table 10-14
timings of signals on the MDC and MDIO pins).
Table 10-14. MII Management Interface Timing
† The ICS1893 is tested at 25 MHz (a 40-ns period) with a 50-pF load. Designs must account for all board loading of
Figure 10-8. MII Management Interface Timing Diagram
MDC
MDIO
(Output)
MDC
MDIO
(Input)
Period
MDC.
Time
ICS1893 - Release
t1
t2
t3
t4
t5
t6
MDC Minimum High Time
MDC Minimum Low Time
MDC Period
MDC Rise Time to MDIO Valid
MDIO Setup Time to MDC
MDIO Hold Time after MDC
lists the significant time periods for the MII Management Interface timing (which consists of
t1
Parameter
t3
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
t2
t5
t4
t6
133
Figure 10-8
shows the timing diagram for the time periods.
Conditions
Chapter 10 DC and AC Operating Conditions
400†
Min.
160
160
10
10
0
Typ.
Max.
300
June, 2000
Units
ns
ns
ns
ns
ns
ns

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