ICS1893Y-10LF IDT, Integrated Device Technology Inc, ICS1893Y-10LF Datasheet - Page 5

• Manufacturer Part Number: ICS1893Y-10LF
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893Y-10LF

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Other names: 1893Y-10LF; 800-1935-5; ICS1893Y-10LF

ICS1893 Rev C 6/6/00
Section
8.5
8.5.1
8.5.2
8.5.3
8.6
8.6.1
8.6.2
8.6.3
8.6.4
8.6.5
8.6.6
8.7
8.7.1
8.7.2
8.7.3
8.7.4
8.7.5
8.8
8.8.1
8.8.2
8.8.3
8.8.4
8.8.5
8.8.6
8.9
8.9.1
8.9.2
8.9.3
8.9.4
8.9.5
8.9.6
8.10
8.10.1
8.10.2
8.10.3
8.10.4
8.10.5
ICS1893 - Release
Register 3: PHY Identifier Register ........................................................................ 74
OUI bits 19-24 (bits 3.15:10) .................................................................................. 74
Manufacturer's Model Number (bits 3.9:4) ............................................................. 75
Revision Number (bits 3.3:0) ................................................................................. 75
Register 4: Auto-Negotiation Register ................................................................... 76
Next Page (bit 4.15) ............................................................................................... 76
IEEE Reserved Bit (bit 4.14) .................................................................................. 77
Remote Fault (bit 4.13) .......................................................................................... 77
IEEE Reserved Bits (bits 4.12:10) ......................................................................... 77
Technology Ability Field (bits 4.9:5) ....................................................................... 78
Selector Field (Bits 4.4:0) ....................................................................................... 79
Register 5: Auto-Negotiation Link Partner Ability Register .................................... 80
Next Page (bit 5.15) ............................................................................................... 80
Acknowledge (bit 5.14) .......................................................................................... 81
Remote Fault (bit 5.13) .......................................................................................... 81
Technology Ability Field (bits 5.12:5) ..................................................................... 81
Selector Field (bits 5.4:0) ....................................................................................... 81
Register 6: Auto-Negotiation Expansion Register .................................................. 82
IEEE Reserved Bits (bits 6.15:5) ........................................................................... 82
Parallel Detection Fault (bit 6.4) ............................................................................. 83
Link Partner Next Page Able (bit 6.3) .................................................................... 83
Next Page Able (bit 6.2) ......................................................................................... 83
Page Received (bit 6.1) ......................................................................................... 83
Link Partner Auto-Negotiation Able (bit 6.0) .......................................................... 83
Register 7: Auto-Negotiation Next Page Transmit Register ................................... 84
Next Page (bit 7.15) ............................................................................................... 85
IEEE Reserved Bit (bit 7.14) .................................................................................. 85
Message Page (bit 7.13) ........................................................................................ 85
Acknowledge 2 (bit 7.12) ....................................................................................... 85
Toggle (bit 7.11) ..................................................................................................... 85
Message Code Field / Unformatted Code Field (bits 7.10:0) ................................. 85
Register 8: Auto-Negotiation Next Page Link Partner Ability Register ................... 86
Next Page (bit 8.15) ............................................................................................... 87
IEEE Reserved Bit (bit 8.14) .................................................................................. 87
Message Page (bit 8.13) ........................................................................................ 87
Acknowledge 2 (bit 8.12) ....................................................................................... 87
Message Code Field / Unformatted Code Field (bits 8.10:0) ................................. 87
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
Table of Contents
Title
5
Table of Contents
June, 2000
Page