STM32W108CBU64TR STMicroelectronics, STM32W108CBU64TR Datasheet - Page 144

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STM32W108CBU64TR

Manufacturer Part Number
STM32W108CBU64TR
Description
MCU, RF, 32BIT, 128K FLASH, 48VFQFPN
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32W108CBU64TR

Controller Family/series
STM32
Core Size
32bit
No. Of I/o's
24
Program Memory Size
128KB
Ram Memory Size
8KB
Cpu Speed
24MHz
Oscillator Type
Internal, External
No. Of Timers
2
Rohs Compliant
Yes
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (128 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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General-purpose timers
144/209
Bit 6 TIM_TG: Trigger Generation
Bit 4 TIM_CC4G: Capture/Compare 4 Generation
Bit 3 TIM_CC3G: Capture/Compare 3 Generation
Bit 2 TIM_CC2G: Capture/Compare 2 Generation
Bit 1 TIM_CC1G: Capture/Compare 1 Generation
Bit 0 TIM_UG: Update Generation
0: Does nothing.
1: Sets the TIM_TIF flag in the INT_TIMxFLAG register.
0: Does nothing.
1: If CC4 configured as output channel:
The TIM_CC4IF flag is set.
If CC4 configured as input channel:
The TIM_CC4IF flag is set.
The INT_TIMMISSCC4IF flag is set if the TIM_CC4IF flag was already high.
The current value of the counter is captured in TMRx_CCR4 register.
0: Does nothing.
1: If CC3 configured as output channel:
The TIM_CC3IF flag is set.
If CC3 configured as input channel:
The TIM_CC3IF flag is set.
The INT_TIMMISSCC3IF flag is set if the TIM_CC3IF flag was already high.
The current value of the counter is captured in TMRx_CCR3 register.
0: Does nothing.
1: If CC2 configured as output channel:
The TIM_CC2IF flag is set.
If CC2 configured as input channel:
The TIM_CC2IF flag is set.
The INT_TIMMISSCC2IF flag is set if the TIM_CC2IF flag was already high.
The current value of the counter is captured in TMRx_CCR2 register.
0: Does nothing.
1: If CC1 configured as output channel:
The TIM_CC1IF flag is set.
If CC1 configured as input channel:
The TIM_CC1IF flag is set.
The INT_TIMMISSCC1IF flag is set if the TIM_CC1IF flag was already high.
The current value of the counter is captured in TMRx_CCR1 register.
0: Does nothing.
1: Re-initializes the counter and generates an update of the registers. This also clears the
prescaler counter but the prescaler ratio is not affected. The counter is cleared if center-aligned
mode is selected or if TIM_DIR=0 (up-counting), otherwise it takes the auto-reload value
(TMR1_ARR) if TIM_DIR=1 (down-counting).
Doc ID 16252 Rev 8
STM32W108CB, STM32W108HB

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