WM8311GEB/V Wolfson Microelectronics, WM8311GEB/V Datasheet - Page 53

• Manufacturer Part Number: WM8311GEB/V
• Description: POWER MANAGEMENT SUBSYSTEM, 121BGA
• Manufacturer: Wolfson Microelectronics

Specifications of WM8311GEB/V

• Supply Voltage: 5.5V
• No. Of Step-down Dc - Dc Converters: 4
• No. Of Ldo Regulators: 7
• Digital Ic Case Style: BGA
• No. Of Pins: 121
• No. Of Regulated Outputs: 9
• Operating Temperature Range: -40°C To
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Pre-Production
14.3 BOOTSTRAP (START-UP) FUNCTION
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The DORW contains 5 pages of data, as illustrated in Figure 18.
Page 0 of the DORW contains a 128-bit pseudo-random unique ID. The unique ID is written to the
OTP at the time of manufacture. It is copied to the DORW when the WM8311 schedules an ‘ON’
transition. This data cannot be changed.
Page 1 of the DORW contains factory-set calibration and configuration data. This data is written to
the OTP at the time of manufacture. It is copied to the DORW when the WM8311 schedules an ‘ON’
transition. This data cannot be changed.
Page 2 and Page 3 of the DORW contain bootstrap configuration data. This defines the sequence
and voltage requirements for powering up the WM8311, and for configuring functions such as the
clocks, FLL, GPIO1-6 and LED status indicators. Under default conditions, the bootstrap data is
loaded into the DORW when the WM8311 schedules an ‘ON’ transition. The WM8311 automatically
determines whether to load the bootstrap data from DBE or from OTP as described in Section 14.3.
Page 4 of the DORW contains a register that is used for DBE validity checking. It is copied to the
DORW whenever the bootstrap configuration data is loaded from DBE in response to a start-up
request in development mode. This register field enables the DBE data to be checked for valid
content.
The OTP contains 4 pages of data, as illustrated in Figure 18. The contents of the OTP pages
correspond to Pages 0, 1, 2 and 3 of the DORW register map addresses.
The DBE memory contains 3 pages of data, as illustrated in Figure 18. The contents of the DBE
pages correspond to Pages 2, 3 and 4 of the DORW register map addresses.
Note that the DBE memory (recommended component) is arranged as 8-bit words in “big-endian”
format, and is therefore addressed as 6 pages of 8-bit data, corresponding to 3 pages of 16-bit data.
For example, the DBE memory address 00h corresponds to bits 15:8 of the first register map word in
DORW Page 2, and DBE address 01h corresponds to bits 7:0 of that same register word in DORW.
The DORW can be accessed directly using the Control Interface in the OFF, ON and SLEEP power
states. Note that Read/Write access to the DBE or OTP memories is not possible directly; these can
only be accessed by copying to/from the DORW.
In the PROGRAM state, Page 2 and Page 3 of the DORW can be written to the OTP.
Under default conditions, the WM8311 bootstrap configuration data is loaded when the WM8311
schedules an ‘ON’ transition. The bootstrap configuration data is loaded into Page 2 and Page 3 of
the DORW from either an external DBE or from the integrated OTP. (The factory-set data in Page 0
and Page 1 is always loaded from the integrated OTP memory.)
If Development mode is selected, then the bootstrap data is loaded from the Dynamic Bootstrap
EEPROM (DBE). If Development mode is not selected, then the bootstrap data is loaded from the
OTP memory.
14.3.1 START-UP FROM OTP MEMORY
In volume production, development mode is not usually selected. In this case, the bootstrap
configuration data is loaded from the internal OTP memory.
The WM8311 performs a check for valid OTP data; if the OTP_CUST_ID field is set to zero, then the
WM8311 remains in the OFF power state. A non-zero OTP_CUST_ID field is used to confirm valid
OTP contents.
The OTP memory contents are defined similarly to Pages 0, 1, 2 and 3 of the DORW memory
contents listed in Section 14.6.
PP, December 2009, Rev 3.0
WM8311
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