PSB21383H-V13TR Infineon Technologies, PSB21383H-V13TR Datasheet - Page 12
![](/photos/31/47/314787/44pin_mqfp_sml.jpg)
PSB21383H-V13TR
Manufacturer Part Number
PSB21383H-V13TR
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21383H-V13TR.pdf
(270 pages)
Specifications of PSB21383H-V13TR
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Comparison of the SCOUT with the two chip solution ISAC-S TE and
ARCOFI-BA; -SP
Operating modes
Supply voltage
Technology
Package
Transceiver
Transformer ratio for
receiver and transmitter
Test Functions
Microcontroller Interface
Microcontroller clock
Register address space
Codec CRAM access
(128 byte)
Command structure of the
register access
Controller data access to
IOM-2 timeslots
Data Sheet
SCOUT
TE
3.3V
CMOS
P-MQFP-44, P-MQFP-64
1:1
- Dig. loop via Layer-2 (TLP)
- Layer-1 disable (DIS_TR)
- Analog loop (LP_A- bit
Serial (SCI)
8-bit parallel (MQFP-64):
Motorola Mux
Siemens/Intel Mux
Siemens/Intel Non-Mux
direct/ indirect Addressing
Provided
( 7.68, 3.84, 0.96MHz,
disabled)
256 byte (32 byte FIFO, 96
byte configuration, 128 byte
CRAM)
Indirect and direct
addressing (general
purpose RAM)
Header/
address(command)/data
All timeslots; various
possibilities of data access
EXLP- bit, ARL)
5 % or 5V
2
5 %
ISAC-S TE / ARCOFI
TE
5V
CMOS, BICMOS
P-MQFP-64 / P-DSO-28
2:1
- Dig. loop via Layer-2
(TLP)
- Layer-1 disable (TEM)
- Analog loop (ARL)
Not provided
8-bit parallel:
Motorola Mux
Siemens/Intel Mux
Siemens/Intel Non-Mux
Not provided
204 byte (32 byte FIFO,
32+12 byte configuration,
128 byte CRAM)
Indirect addressing
Address (command)/data
Restricted access to B- and
IC-channel
5 %
PSB 21381/2
PSB 21383/4
2001-03-12
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