PSB21383H-V13TR Infineon Technologies, PSB21383H-V13TR Datasheet - Page 166
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PSB21383H-V13TR
Manufacturer Part Number
PSB21383H-V13TR
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21383H-V13TR.pdf
(270 pages)
Specifications of PSB21383H-V13TR
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Data Sheet
4.8.1.1
Value after reset: BF
CMDW
R/W
CMDx
Coding of Status Operations (SOP):
Bit 3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Description of the Command Word (CMDW)
7
0:
1:
Address to internal programmable locations
CMD 5
R/W
writing to configuration registers or to coefficient RAM
reading from configuration registers or from coefficient RAM
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
H
4
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
3
X
X
X
X
CMD
Name
SOP_0
SOP_1
SOP_2
SOP_3
SOP_4
SOP_5
SOP_6
SOP_7
SOP_8
SOP_9
SOP_A
SOP_B
SOP_C
SOP_D
SOP_E
SOP_F
2
X
X
X
X
CMD5
1
X
X
X
X
0
X
X
X
X
CMD4
156
Status
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
code reserved
status operation (SOP)
coefficient operation (COP)
extended operation (XOP)
CMD3
CMD
Seq. Len.
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
9
CMD2
CMD Sequence
Description
(Registers being
accessed)
<GCR>
<PFCR>
<TGCR>
<TGSR>
<ACR>
<ATCR>
<ARCR>
<DFR>
<DSSR>
<XCR/XSR>
<MASK1R>
<MASK2R>
<TFCR>
<TMR1>
<TMR2>
<DFR>..<GCR>
CMD1
PSB 21381/2
PSB 21383/4
2001-03-12
0
CMD0
Codec
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