P89LPC936FDH-T NXP Semiconductors, P89LPC936FDH-T Datasheet - Page 29

• Manufacturer Part Number: P89LPC936FDH-T
• Description: MCU 8-Bit 89LP 80C51 CISC 16KB Flash 2.5V/3.3V 28-Pin TSSOP T/R
• Manufacturer: NXP Semiconductors

Specifications of P89LPC936FDH-T

• Package: 28TSSOP
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Ram Size: 768 Byte
• Program Memory Size: 16 KB
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx8-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 2

NXP Semiconductors
P89LPC933_934_935_936
Product data sheet
Fig 9.
(1) See
(2) P89LPC935/936
EAD (P89LPC933/934)
(RTCCON.1)
EADEE (P89LPC935)
Interrupt sources, interrupt enables, and power-down wake-up sources
WDOVF
Section 8.19 “CCU (P89LPC935/936)”
ERTC
RTCF
ENADCI0
ENADCI1
ADCI0
ENBI0
BNDI0
EEIF
ADCI1
ENBI1
BNDI1
(2)
(2)
(2)
(2)
(2)
These external interrupts can be programmed to be level-triggered or edge-triggered by
setting or clearing bit IT1 or IT0 in register TCON.
In edge-triggered mode, if successive samples of the INTn pin show a HIGH in one cycle
and a LOW in the next cycle, the interrupt request flag IEn in TCON is set, causing an
interrupt request.
If an external interrupt is enabled when the P89LPC933/934/935/936 is put into
Power-down or Idle mode, the interrupt will cause the processor to wake-up and resume
operation. Refer to
any CCU interrupt
EA (IE0.7)
TI & RI/RI
EWDRT
ES/ESR
ECCU
CMF2
CMF1
EKBI
ESPI
KBIF
EI2C
SPIF
All information provided in this document is subject to legal disclaimers.
BOF
EBO
EST
EX0
EX1
ET0
ET1
TF0
TF1
IE0
IE1
EC
(1)
SI
TI
Section 8.15 “Power reduction modes”
Rev. 8 — 12 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC933/934/935/936
for details.
002aab081
interrupt
to CPU
wake-up
(if in power-down)
© NXP B.V. 2011. All rights reserved.
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