P89LPC936FDH-T NXP Semiconductors, P89LPC936FDH-T Datasheet - Page 54

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P89LPC936FDH-T

Manufacturer Part Number
P89LPC936FDH-T
Description
MCU 8-Bit 89LP 80C51 CISC 16KB Flash 2.5V/3.3V 28-Pin TSSOP T/R
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P89LPC936FDH-T

Package
28TSSOP
Device Core
80C51
Family Name
89LP
Maximum Speed
18 MHz
Ram Size
768 Byte
Program Memory Size
16 KB
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
26
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx8-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
2
NXP Semiconductors
P89LPC933_934_935_936
Product data sheet
9.4.2 Fixed channel, continuous conversion mode
9.4.3 Auto scan, single conversion mode
9.4.4 Auto scan, continuous conversion mode
9.4.5 Dual channel, continuous conversion mode
9.4.6 Single step mode
9.5.1 Timer triggered start
9.5.2 Start immediately
9.5 Conversion start modes
A single input channel can be selected for continuous conversion. The results of the
conversions will be sequentially placed in the four result registers. An interrupt, if enabled,
will be generated after every four conversions. Additional conversion results will again
cycle through the four result registers, overwriting the previous results. Continuous
conversions continue until terminated by the user.
Any combination of the four input channels can be selected for conversion. A single
conversion of each selected input will be performed and the result placed in the result
register which corresponds to the selected input channel. An interrupt, if enabled, will be
generated after all selected channels have been converted. If only a single channel is
selected this is equivalent to single channel, single conversion mode.
Any combination of the four input channels can be selected for conversion. A conversion
of each selected input will be performed and the result placed in the result register which
corresponds to the selected input channel. An interrupt, if enabled, will be generated after
all selected channels have been converted. The process will repeat starting with the first
selected channel. Additional conversion results will again cycle through the four result
registers, overwriting the previous results. Continuous conversions continue until
terminated by the user.
This is a variation of the auto scan continuous conversion mode where conversion occurs
on two user-selectable inputs. The result of the conversion of the first channel is placed in
result register, ADxDAT0. The result of the conversion of the second channel is placed in
result register, ADxDAT1. The first channel is again converted and its result stored in
ADxDAT2. The second channel is again converted and its result placed in ADxDAT3. An
interrupt is generated, if enabled, after every set of four conversions (two conversions per
channel).
This special mode allows ‘single-stepping’ in an auto scan conversion mode. Any
combination of the four input channels can be selected for conversion. After each channel
is converted, an interrupt is generated, if enabled, and the A/D waits for the next start
condition. May be used with any of the start modes.
An A/D conversion is started by the overflow of Timer 0. Once a conversion has started,
additional Timer 0 triggers are ignored until the conversion has completed. The Timer
triggered start mode is available in all A/D operating modes.
Programming this mode immediately starts a conversion. This start mode is available in all
A/D operating modes.
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 12 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC933/934/935/936
© NXP B.V. 2011. All rights reserved.
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