P89LPC936FDH-T NXP Semiconductors, P89LPC936FDH-T Datasheet - Page 31

• Manufacturer Part Number: P89LPC936FDH-T
• Description: MCU 8-Bit 89LP 80C51 CISC 16KB Flash 2.5V/3.3V 28-Pin TSSOP T/R
• Manufacturer: NXP Semiconductors

Specifications of P89LPC936FDH-T

• Package: 28TSSOP
• Device Core: 80C51
• Family Name: 89LP
• Maximum Speed: 18 MHz
• Ram Size: 768 Byte
• Program Memory Size: 16 KB
• Operating Supply Voltage: 2.5|3.3 V
• Data Bus Width: 8 Bit
• Program Memory Type: Flash
• Number Of Programmable I/os: 26
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx8-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 2

NXP Semiconductors
P89LPC933_934_935_936
Product data sheet
8.13.1.3 Input-only configuration
8.13.1.4 Push-pull output configuration
8.13.2 Port 0 analog functions
8.13.3 Additional port features
8.14 Power monitoring functions
An open-drain port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
The input-only port configuration has no output drivers. It is a Schmitt trigger input that
also has a glitch suppression circuit.
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output. A push-pull port pin has a Schmitt
trigger input that also has a glitch suppression circuit.
The P89LPC933/934/935/936 incorporates two Analog Comparators. In order to give the
best analog function performance and to minimize power consumption, pins that are being
used for analog functions must have the digital outputs and digital inputs disabled.
Digital outputs are disabled by putting the port output into the Input-Only
(high-impedance) mode.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register, bits 1:5.
On any reset, PT0AD[1:5] defaults to logic 0s to enable digital functions.
After power-up, all pins are in Input-Only mode.
Remark: Please note that this is different from the LPC76x series of devices.
Every output on the P89LPC933/934/935/936 has been designed to sink typical LED
drive current. However, there is a maximum total output current for all ports which must
not be exceeded. Please refer to
specifications.
All ports pins that can function as an output have slew rate controlled outputs to limit noise
generated by quickly switching output signals. The slew rate is factory-set to
approximately 10 ns rise and fall times.
The P89LPC933/934/935/936 incorporates power monitoring functions designed to
prevent incorrect operation during initial power-up and power loss or reduction during
operation. This is accomplished with two hardware functions: Power-on detect and
brownout detect.
•
•
After power-up, all I/O pins except P1.5, may be configured by software.
Pin P1.5 is input only. Pins P1.2 and P1.3 and are configurable for either input-only or
open-drain.
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 12 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
Table 11 “Static characteristics”
P89LPC933/934/935/936
for detailed
© NXP B.V. 2011. All rights reserved.
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