ISL9N315AD3ST Fairchild Semiconductor, ISL9N315AD3ST Datasheet - Page 8

• Manufacturer Part Number: ISL9N315AD3ST
• Description: MOSFET Power N-Ch LL UltraFET PWM Optimized
• Manufacturer: Fairchild Semiconductor

Specifications of ISL9N315AD3ST

• Configuration: Single
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 0.028 Ohms
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 30 A
• Power Dissipation: 55 W
• Maximum Operating Temperature: + 175 C
• Mounting Style: SMD/SMT
• Package / Case: TO-252AA
• Minimum Operating Temperature: - 55 C
• Lead Free Status / Rohs Status: Details

©2003 Fairchild Semiconductor Corporation
PSPICE Electrical Model
.SUBCKT ISL9N315AD3 2 1 3 ;
CA 12 8 5.0e-10
CB 15 14 3.9e-10
CIN 6 8 7.8e-10
DBODY 7 5 DBODYMOD
DBREAK 5 11 DBREAKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 31.0
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTHRES 6 21 19 8 1
EVTEMP 20 6 18 22 1
IT 8 17 1
LDRAIN 2 5 1.0e-9
LGATE 1 9 4.53e-9
LSOURCE 3 7 5.38e-10
MMED 16 6 8 8 MMEDMOD
MSTRO 16 6 8 8 MSTROMOD
MWEAK 16 21 8 8 MWEAKMOD
RBREAK 17 18 RBREAKMOD 1
RDRAIN 50 16 RDRAINMOD 1.2e-3
RGATE 9 20 2.8
RLDRAIN 2 5 10
RLGATE 1 9 45.3
RLSOURCE 3 7 5.4
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
RSOURCE 8 7 RSOURCEMOD 1.0e-2
RVTHRES 22 8 RVTHRESMOD 1
RVTEMP 18 19 RVTEMPMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*120),3.5))}
.MODEL DBODYMOD D (IS = 3.5e-11 N=1.12 RS = 6.4e-3 TRS1 = 1e-3 TRS2 = 2.0e-6 XTI=2.3 CJO = 6.1e-10 TT = 1e-8
M=0.62)
.MODEL DBREAKMOD D (RS = 6.0e-1 TRS1 = 1e-3 TRS2 = -8.5e-6)
.MODEL DPLCAPMOD D (CJO = 3.4e-10 IS = 1e-30 N = 10 M = 0.45)
.MODEL MMEDMOD NMOS (VTO = 1.68 KP = 3.5 IS=1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.8)
.MODEL MSTROMOD NMOS (VTO = 2.00 KP = 35 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u)
.MODEL MWEAKMOD NMOS (VTO = 1.36 KP = 0.05 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 28 RS = 0.1)
.MODEL RBREAKMOD RES (TC1 = 1e-3 TC2 = -1e-7)
.MODEL RDRAINMOD RES (TC1 = 3.4e-2 TC2 = 6.0e-5)
.MODEL RSLCMOD RES (TC1 = 1e-3 TC2 = 1e-6)
.MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6)
.MODEL RVTHRESMOD RES (TC1 = -1.9e-3 TC2 = -8e-6)
.MODEL RVTEMPMOD RES (TC1 = -2e-3 TC2 = 1e-6)
.MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.0 VOFF= -1.5)
.MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.5 VOFF= -4.0)
.MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.5 VOFF= 0.3)
.MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.3 VOFF= -0.5)
.ENDS
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
GATE
1
RLGATE
rev October 02
LGATE
9
RGATE
CA
12
20
+
EVTEMP
S1A
S1B
ESG
18
22
EGS
13
8
+
-
-
13
6
8
10
+
+
-
-
14
13
RSLC2
6
6
8
S2A
S2B
DPLCAP
EVTHRES
+
EDS
19
8
15
CB
CIN
-
+
-
5
8
51
5
5
+
-
MSTRO
14
51
21
RDRAIN
RSLC1
50
ESLC
16
8
MMED
8
EBREAK
IT
DBREAK
RSOURCE
17
MWEAK
RVTHRES
RBREAK
11
+
-
17
18
7
ISL9N315AD3/ISL9N315AD3ST Rev.A1
+
-
18
22
RVTEMP
19
RLSOURCE
DBODY
LSOURCE
VBAT
RLDRAIN
LDRAIN
SOURCE
DRAIN
2
3