ST72C334N2B6 STMicroelectronics, ST72C334N2B6 Datasheet - Page 32

• Manufacturer Part Number: ST72C334N2B6
• Description: Microcontrollers (MCU) Flash 8K SPI/SCI
• Manufacturer: STMicroelectronics

Specifications of ST72C334N2B6

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: SDIP-56
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: No

ST72334J/N, ST72314J/N, ST72124J
4.3 CLOCK SECURITY SYSTEM (CSS)
The Clock Security System (CSS) protects the
ST7 against main clock problems. To allow the in-
tegration of the security features in the applica-
tions, it is based on a clock filter control and an In-
ternal Safe Oscillator. The CSS can be disabled by
OPTION BYTE.
4.3.1 Clock Filter Control
The Clock Filter is based on a clock frequency lim-
itation function.
This filter function is able to detect and filter high
frequency spikes on the ST7 main clock.
If the oscillator is not working properly (e.g. work-
ing at a harmonic frequency of the resonator), the
current active oscillator clock can be totally fil-
tered, and then no clock signal is available for the
ST7 from this oscillator anymore. If the original
clock source recovers, the filtering is stopped au-
tomatically and the oscillator supplies the ST7
clock.
Figure 23. Clock Filter Function
Figure 24. Safe Oscillator Function
32/125
INTERNAL
ST7
CLOCK
INTERNAL
ST7
CLOCK
MAIN
OSCILLATOR
CLOCK
MAIN
OSCILLATOR
CLOCK
SAFE
OSCILLATOR
CLOCK
4.3.2 Safe Oscillator Control
The Safe Oscillator of the CSS block is a low fre-
quency back-up clock source (see Figure 24).
If the clock signal disappears (due to a broken or
disconnected resonator...) during a Safe Oscillator
period, the Safe oscillator delivers a low frequency
clock signal which allows the ST7 to perform some
rescue operations.
Automatically, the ST7 clock source switches back
from the Safe Oscillator if the original clock source
recovers.
Limitation detection
The automatic Safe Oscillator selection is notified
by hardware setting the CSSD bit of the CRSR
register. An interrupt can be generated if the CS-
SIE bit has been previously set.
These two bits are described in the CRSR register
description.