ST72C334N2B6 STMicroelectronics, ST72C334N2B6 Datasheet - Page 35

• Manufacturer Part Number: ST72C334N2B6
• Description: Microcontrollers (MCU) Flash 8K SPI/SCI
• Manufacturer: STMicroelectronics

Specifications of ST72C334N2B6

• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 384 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 16 bit
• Operating Supply Voltage: 3.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Package / Case: SDIP-56
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: No

MAIN CLOCK CONTROLLER (Cont’d)
MISCELLANEOUS REGISTER 1 (MISCR1)
See section 6.2 on page 47.
MAIN CLOCK CONTROL/STATUS REGISTER
(MCCSR)
Read/Write
Reset Value: 0000 0001 (01h)
Bit 7:4 = Reserved, always read as 0.
Bit 3:2 = TB1-TB0 Time base control
These bits select the programmable divider time
base. They are set and cleared by software.
Table 5. MCC Register Map and Reset Values
Prescaler
Counter
Address
160000
400000
7
0
32000
64000
(Hex.)
0029h
0
f
OSC
MCCSR
Reset Value
Register
20ms
50ms
0
4ms
8ms
Label
=8MHz f
Time Base
0
OSC
TB1
10ms
25ms
=16MHz
2ms
4ms
7
0
TB0
TB1
6
0
OIE
0
0
1
1
TB0
OIF
0
0
1
0
1
5
0
A modification of the time base is taken into ac-
count at the end of the current period (previously
set) to avoid unwanted time shift. This allows to
use this time base as a real time clock.
Bit 1 = OIE Oscillator interrupt enable
This bit set and cleared by software.
0: Oscillator interrupt disabled
1: Oscillator interrupt enabled
This interrupt allows to exit from ACTIVE-HALT
mode.
When this bit is set, calling the ST7 software HALT
instruction enters the ACTIVE-HALT power saving
mode
Bit 0 = OIF Oscillator interrupt flag
This bit is set by hardware and cleared by software
reading the CSR register. It indicates when set
that the main oscillator has measured the selected
elapsed time (TB1:0).
0: Timeout not reached
1: Timeout reached
Warning: The BRES and BSET instructions must
not be used on the MCCSR register to avoid unin-
tentionally clearing the OIF bit.
4
0
.
ST72334J/N, ST72314J/N, ST72124J
TB1
3
0
TB0
2
0
OIE
1
0
OIF
35/125
0
1